31
Thomas W Bachelder, Dennis R Barringer, Dennis R Conti, James M Crafts, David L Gardell, Paul M Gaschke, Mark R Laforce, Charles H Perry, Roger R Schmidt, Joseph J Van Horn, Wade H White: Segmented architecture for wafer test & burn-in. International Business Machines Corporation, Driggs Lucas Brubaker & Hogg Co Lpa, December 13, 2001: US20010050567-A1

An apparatus for simultaneously testing or burning in a large number of the integrated circuit chips on a product wafer includes probes mounted on a first board and tester chips mounted on a second board, there being electrical connectors connecting the two boards. The tester chips are for distribut ...


32
Evan Grund: Test circuits and current pulse generator for simulating an electostatic discharge. Evan Grund, May 28, 2009: US20090134880-A1

This invention is an electrostatic discharge testing circuit that can deliver current pulses to a component under test (CUT) with a custom amplitude versus time profile shape. Pulse generation with customized shapes is accomplished by discharging an energy storage network comprised of capacitor(s), ...


33
Leuschner Horst: Target keys for wafer probe alignment. Sgs Semiconductor Corporation, SHAPIRO David M, October 23, 1986: WO/1986/006176

A system of at least three alignment key paterns (10, 12) and (14) located within the scribe lines of a semiconductor chip which allow more accurate placement of wafer probes and more accurate location of fuses for the purposes of blowing selected ones of those fuses by means of laser energy. A part ...


34

35
WEIKLE II Robert M, LICHTENBERGER Arthur Weston, BARKER Nicolas Scott, RECK Theodore James, XU Haiyong, CHEN Lihan: Sondes sur tranche micro-usinées et procédé connexe, Micromachined on-wafer probes and related method. University Of Virginia Patent Foundation, WEIKLE II Robert M, LICHTENBERGER Arthur Weston, BARKER Nicolas Scott, RECK Theodore James, XU Haiyong, CHEN Lihan, DECKER Robert J, February 23, 2012: WO/2012/024007

A micromaching process to fabricate a single chip that simply drops into a supporting structure. The micromaching process provides the ability to create a probe that will interface with integrated circuits, for example, operating at frequencies in the range of about 100GHz to about 3,000 GHz (3 THz) ...


36
Ito Yasutaka, Hiramatsu Yasuji: Ceramic substrate, ceramic heater, electrostatic chuck and wafer probe for semiconductor manufacturing and checking device. Ibiden, January 11, 2002: TW472500

The present invention provides a ceramic substrate for use in semiconductor production and inspecting devices, having a reduced rate of emission of &agr; rays and capable of preventing the malfunction of heaters, wafer probes, etc. and the reduction of chucking force, and reducing the number of part ...


37
Nagase Hiroyuki, Morita Junichi, Nishii Yasushi, Misaki Akio, Yamada Shinichi: Method of combining capacity of variable capacity diode. Hitachi, Hitachi Tokyo Electron, May 31, 1994: JP1994-151901

PURPOSE: To improve the continuity of the capacity in a capacity variable diode being produced in a through process production consisting of assembling, sorting, and packing. CONSTITUTION: Out of the capacity values at a plurality of reversely applied voltage points measured with wafer probes, the c ...


38
Kamata Minoru: Manufacture of semiconductor device. NEC, January 14, 2000: JP2000-012776

PROBLEM TO BE SOLVED: To prevent a defective capacitor from occurring due to an electrical discharge that occurs through a dielectric film. SOLUTION: An upper electrode 114 is formed above a semiconductor board 104, a wiring 14 electrically connected to the lower electrode of a capacitor 108 is form ...


39
Lee Seok Haeng: Probe card for testing multiple memory chips of wafer. International Technology, February 15, 2001: KR1019990029420

PURPOSE: A probe card is provided, which is capable of testing simultaneously a plurality of semiconductor memory chips fabricated on a wafer, to thereby achieve an improved productivity. CONSTITUTION: A probe card comprises a base plate(13) having a plurality of probe groups forming a matrix where ...


40
Ichimura Isao: Semiconductor integrated circuit device and manufacture thereof. NEC, August 25, 1992: JP1992-237142

PURPOSE: To make possible the improvement of reliability of the assembly of a multipin LSI and the improvement of the yield of the LSI by a method wherein the LSI is provided with bonding pad parts and pads for wafer probing test use, which are connected to the bonding pad parts. CONSTITUTION: Bondi ...