1
Taber H Smith, Vikas Mehrotra, David White: Use of models in integrated circuit fabrication. Cadence Design Systems, Bingham McCutchen, April 15, 2008: US07360179 (193 worldwide citation)

A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use p ...


2
Taber H Smith, Vikas Mehrotra, David White: Use of models in integrated circuit fabrication. Fish & Richardson PC, December 11, 2003: US20030229875-A1

A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use p ...


3
Taber H Smith, Vikas Mehrotra, David White: Use of models in integrated circuit fabrication. Praesagus a Massachusetts corporation, Fish & Richardson PC, October 20, 2005: US20050235246-A1

A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use p ...



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