1
Kozo Kimura, Kosuki Yoshioka, Tokuzo Kiyohara: Speculative execution processor. Matsushita Electric Co, Price Gess & Ubell, April 23, 1996: US05511172 (43 worldwide citation)

The present invention discloses a speculative execution processor including a plurality of executing units for processing in parallel a plurality of instructions in an instruction sequence stored in its memory. The processor comprises an instruction type distinguishing device for distinguishing a ty ...


2
Rajiv Gupta, Alan H Karp: Method and system for selecting instructions for re-execution for in-line exception recovery in a speculative execution processor. Hewlett Packard Company, March 9, 1999: US05881280 (32 worldwide citation)

A method and related control logic for performing in line recovery from deferred exceptions generated by speculative operations. The control logic includes a re-execution register to mark operands of operations that should be re-executed in a special recovery mode. When the processor detects a defer ...


3
Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi: Structure and method for high-performance speculative execution processor providing special features. Fujitsu, January 7, 1998: EP0815507-A1 (4 worldwide citation)

A high-performance processor, such as a central processing unit (CPU) (51), that includes structure and methods for providing numerous special processor features and capabilities is disclosed. These structures and methods include, but are not limited to, structure and methods for: (1) aggressively s ...


4
Shailender Chaudhry, Quinn A Jacobson, Paul Caprioli, Marc Tremblay: Return address stack recovery in a speculative execution computing apparatus. Oracle America, Gunnison McKay & Hodgson L, Forrest Gunnison, November 16, 2010: US07836290 (3 worldwide citation)

A technique recovers return address stack (RAS) content and restores alignment of a RAS top-of-stack (TOS) pointer for occurrences of mispredictions due to speculative operation, out-of-order instruction processing, and exception handling. In at least one embodiment of the invention, an apparatus in ...


5
Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi: Structure and method of high-performance speculative execution processor for providing special function. Fujitsu, November 1, 2007: JP2007-287176 (3 worldwide citation)

PROBLEM TO BE SOLVED: To provide a high-performance processor, such as a central processing unit (CPU), including a structure and methods for providing a lot of special processor functions and capabilities.SOLUTION: Structure and methods of a high-performance, such as a central processing unit (CPU) ...


6
Chaudhry Shailender, Jacobson Quinn A, Caprioli Paul, Tremblay Marc: Computing apparatus and method for speculative execution of instructions. Sun Microsystems, May 16, 2007: EP1785846-A2

One embodiment of the invention recovers return address stack (RAS) content and restores alignment of a RAS top-of-stack (TOS) pointer for occurrences of mispredictions due to speculative operation, out-of-order instruction processing, and exception handling. In at least one embodiment of the invent ...


7
Shailender Chaudhry, Quinn A Jacobson, Paul Caprioli, Marc Tremblay: Return address stack recovery in a speculative execution computing apparatus. Sun Microsystems, Gunnison Mckay & Hodgson, May 10, 2007: US20070106888-A1

A technique recovers return address stack (RAS) content and restores alignment of a RAS top-of-stack (TOS) pointer for occurrences of mispredictions due to speculative operation, out-of-order instruction processing, and exception handling. In at least one embodiment of the invention, an apparatus in ...


8
Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi: Structure and method for high-performance speculative execution processor providing special features. Fujitsu, Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi, SHERIDAN James A, August 22, 1996: WO/1996/025705

A high-performance processor, such as a central processing unit (CPU) (51), that includes structure and methods for providing numerous special processor features and capabilities is disclosed. These structures and methods include, but are not limited to, structure and methods for: (1) aggressively s ...


9
Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi: Structure and method for high-performance speculative execution processor providing special features. Fujitsu, April 9, 2009: JP2009-076083

PROBLEM TO BE SOLVED: To provide a high-performance processor such as a central processing unit (CPU) including structures and methods for providing a lot of special processor functions and capabilities.SOLUTION: These structures and methods include: (1) aggressively scheduling long latency instruct ...


10
Shen Gene W, Szeto John, Patkar Niteen A, Shebanow Michael C, Osone Hideki, Simone Michael A, Maruyama Takumi: Structure and method for high performance speculative execution processor for providing special function. Fujitsu, April 20, 2006: JP2006-107536

PROBLEM TO BE SOLVED: To provide a high-performance processor such as a central processing unit (CPU) including a structure and methods for providing a plurality of special processor functions and capabilities.SOLUTION: The structure and methods of a high-performance processor comprises: (1) aggress ...