1
Ajit V Sathe, Paul H Wermer: Solderless electronics packaging. Intel Corporation, Schwegman Lundberg Woessner & Kluth P A, January 11, 2005: US06840777 (52 worldwide citation)

To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land ...


2
Ajit V Sathe, Paul H Wermer: Solderless electronics packaging and methods of manufacture. Intel Corporation, Schwegman Lundberg Woessner & Kluth P A, January 9, 2007: US07159313 (10 worldwide citation)

To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land ...


3
Ajit V Sathe, Paul H Wermer: Solderless electronics packaging and methods of manufacture. Intel Corporation, Schwegman Lundberg Woessner & Kluth PA, May 30, 2002: US20020065965-A1

To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land ...


4
Ajit V Sathe, Paul H Wermer: Solderless electronics packaging and methods of manufacture. Intel Corporation, Schwegman Lundberg Woessner & Kluth Pa, May 5, 2005: US20050091844-A1

To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land ...