1
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart verify for multi-state memories. SanDisk Corporation, Davis Wright Tremaine, July 10, 2007: US07243275 (110 worldwide citation)

A “smart verify” technique, whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations, is presented. This technique can increase multi-state write speed while maintaining reliable ope ...


2
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart verify for multi-state memories. SanDisk Corporation, Parsons Hsue & de Runtz, July 4, 2006: US07073103 (76 worldwide citation)

The present invention presents a “smart verify” technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintain ...


3
Gongwer Geoffrey S, Guterman Daniel C, Fong Yupin Kawing: Smart verify for multi-state memories. Sandisk Corporation, PARSONS Gerald P, June 24, 2004: WO/2004/053882 (9 worldwide citation)

The present invention presents a 'smart verify' technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintain ...


4
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart verify for multi-state memories. SanDisk Corporation, Davis Wright Tremaine, September 1, 2009: US07584391 (5 worldwide citation)

A “smart verify” technique, whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations, is presented. This technique can increase multi-state write speed while maintaining reliable ope ...


5
Feng Pan, Jun Wang, Shankar Guhados, Bo Lei: Charge pump based over-sampling ADC for current detection. SanDisk Technologies, Stoel Rives, November 7, 2017: US09810723 (1 worldwide citation)

Techniques are presented for determining current levels based on the behavior of a charge pump system while driving a load under regulation. While driving the load under regulation, the number of pump clocks during a set interval is counted. This can be compared to a reference that can be obtained, ...


6

7
Gongwer Geoffrey S, Guterman Daniel C, Fong Yupin Kawing: Smart verify for multi-state memories. Sandisk, August 31, 2005: EP1568041-A1

The present invention presents a "smart verify" technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintain ...


8
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart verify for multi-state memories. Parsons Hsue & de Runtz, June 10, 2004: US20040109362-A1

The present invention presents a “smart verify” technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintain ...


9
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart Verify For Multi-State Memories. Davis Wright Tremaine Sandisk Corporation, October 4, 2007: US20070234144-A1

A “smart verify” technique, whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations, is presented. This technique can increase multi-state write speed while maintaining reliable ope ...


10
Geoffrey S Gongwer, Daniel C Guterman, Yupin Kawing Fong: Smart verify for multi-state memories. Parsons Hsue & de Runtz, May 18, 2006: US20060107136-A1

The present invention presents a “smart verify” technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintain ...