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Christopher Marc Scanlan, Ronald Patrick Huemoeller: Semiconductor package including a top-surface metal layer for implementing circuit features. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, December 15, 2009: US07633765 (220 worldwide citation)

A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a conformal shield cap implementation. The ...


2
Christopher Marc Scanlan, Ronald Patrick Huemoeller: Semiconductor package including a top-surface metal layer for implementing circuit features. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, September 13, 2011: US08018068 (30 worldwide citation)

A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a conformal shield cap implementation. The ...


3
Christopher Marc Scanlan, Ronald Patrick Huemoeller: Semiconductor package including a top-surface metal layer for implementing circuit features. Amkor Technology, McKay and Hodgson, Serge J Hodgson, July 24, 2012: US08227338 (13 worldwide citation)

A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a conformal shield cap implementation. The ...


4
Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner: Buildup dielectric layer having metallization pattern semiconductor package fabrication method. McAndrews Held & Malloy, June 27, 2017: US09691635 (1 worldwide citation)

A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is depo ...


5
Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner: Encapsulated semiconductor package. AMKOR TECHNOLOGY, McAndrews Held & Malloy, November 7, 2017: US09812386

An encapsulated semiconductor package. As non-limiting examples, various aspects of the present disclosure provide an integrated circuit package comprising a laminate, an integrated circuit die coupled to the laminate, an encapsulant surrounding at least top and side surface of the integrated circui ...