Peter D MacWilliams, Robert L Farrell, Adalberto Golbert, Itzik Silas: Second level cache controller unit and system. Intel Corporation, Blakely Sokoloff Taylor & Zafman, October 11, 1994: US05355467 (136 worldwide citation)

A second level cache memory controller, implemented as an integrated circuit unit, operates in conjunction with a secondary random access cache memory and a main memory (system) bus controller to form a second level cache memory subsystem. The subsystem is interfaced to the local processor (CPU) bus ...