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Laurence H Cooke, Robert A Feretich, Richard F Boyle: Scannable asynchronous/synchronous CMOS latch. Storage Technology Partners, Bryant R Gold, James R Young, September 10, 1985: US04540903 (75 worldwide citation)

A scannable asynchronous/synchronous CMOS latch circuit that includes a first, second, and third latch element, an asynchronous latch section, and a clock control section. When operated as a synchronous latch, the first latch element operates as the "master" portion and the second latch element acts ...


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Cooke Laurence H, Feretich Robert A, Boyle Richard F: A scannable asynchronous/synchronous cmos latch. Storage Technology Partners, GOLD Bryant R, April 25, 1985: WO/1985/001825

A scannable asynchronous/synchronous CMOS latch circuit that includes a first (15), second (16), and third (17) latch element, an asynchronous latch section (9), and a clock control section (29). When operated as a synchronous latch, the first latch element (15) operates as the "master" portion and ...


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