1
Rafael C Camarota, Frederick C Furtek, Walford W Ho, Edward H Browder: Programmable logic cell and array. Concurrent Logic, Pennie & Edmonds, September 1, 1992: US05144166 (334 worldwide citation)

A programmable logic array comprising cells and a bus network in which the cells are arranged in a two-dimensional matrix of rows and columns and are interconnected by the bus network. The cells are also interconnected by a two-dimensional array of direct connections between a cell and its four near ...


2
Frederick C Furtek: Programmable logic cell and array. April 17, 1990: US04918440 (161 worldwide citation)

Programmable logic cells, and arrays of those cells, having certain characteristics, including: (1) the ability to program each cell to act either as a logic element or as a logical identity element(s) between one or more inputs and one or more outputs; (2) the ability to rotate circuits by 90.degre ...


3
Rafael C Camarota, Frederick C Furtek, Walford W Ho, Edward H Browder: Programmable logic cell and array with bus repeaters. Concurrent Logic, Pennie & Edmonds, June 8, 1993: US05218240 (83 worldwide citation)

A programmable logic array comprising cells and a bus network in which the cells are arranged in a two-dimensional matrix of rows and columns and are interconnected by the bus network. The cells are also interconnected by a two-dimensional array of direct connections between a cell and its four near ...


4
Frederick C Furtek: Programmable logic cell and array. Concurrent Logic, Apple Computer, Pennie & Edmonds, May 28, 1991: US05019736 (79 worldwide citation)

A logic cell is described having four inputs, four outputs, a control store, means for multiplexing the four inputs onto two leads and logic means that operate in response to the signals on the two leads and signals from the control store to product output signals which are applied to the four outpu ...


5
Frederick C Furtek: Programmable logic cell and array. Concurrent Logic, Apple Computer, Pennie & Edmonds, October 13, 1992: US05155389 (54 worldwide citation)

A logic cell is described having four inputs, four outputs, a control store, means for multiplexing the four inputs onto two leads and logic means that operate in response to the signals on the two leads and signals from the control store to produce output signals which are applied to the four outpu ...


6
Frederick C Furtek: Programmable logic cell and array. Apple Computer, Concurrent Logic, Pennie & Edmonds, February 18, 1992: US05089973 (41 worldwide citation)

Programmable logic cells, and arrays of those cells, having certain characteristics, including: (1) the ability to program each cell to act either as a logic element or as a logical identity element(s) between one or more inputs and one or more outputs; (2) the ability to rotate circuits by 90.degre ...


7
Fethi Dhaoui, John McCollum, Vidyadhara Bellippady, Zhigang Wang: Non-volatile two-transistor programmable logic cell and array layout. Actel Corporation, Sierra Patent Group, October 23, 2007: US07285818 (11 worldwide citation)

A two-transistor non-volatile memory cell is formed in a semiconductor body. A memory-transistor well is disposed within the semiconductor body. A switch-transistor well is disposed within the semiconductor body and is electrically isolated from the memory transistor well. A memory transistor includ ...


8
Fethi Dhaoui, John McCollum, Vidyahara Bellippady, Zhigang Wang: Non-volatile two-transistor programmable logic cell and array layout. Actel Corporation, Sierra Patent Group, March 11, 2008: US07342278 (6 worldwide citation)

A two-transistor non-volatile memory cell is formed in a semiconductor body. A memory-transistor well is disposed within the semiconductor body. A switch-transistor well is disposed within the semiconductor body and is electrically isolated from the memory transistor well. A memory transistor includ ...


9
Dhaoui Fethi, Mccollum John, Bellippady Vidyadhara, Wang Zhigang: Non-volatile two-transistor programmable logic cell and array layout. Actel Corporation, Dhaoui Fethi, Mccollum John, Bellippady Vidyadhara, Wang Zhigang, D ALESSANDRO Kenneth, December 28, 2006: WO/2006/138086 (6 worldwide citation)

A two-transistor non-volatile memory cell is formed in a semiconductor body. A memory-transistor well is disposed within the semiconductor body. A switch- transistor well is disposed within the semiconductor body and is electrically isolated from the memory transistor well. A memory transistor inclu ...


10
Fethi Dhaoui, John McCollum, Vidyadhara Bellippady, William C Plants, Zhigang Wang: Non-volatile two-transistor programmable logic cell and array layout. Actel Corporation, Lewis and Roca, May 26, 2009: US07538379 (4 worldwide citation)

A two-transistor non-volatile memory cell is formed in a semiconductor body. A memory-transistor well is disposed within the semiconductor body. A switch-transistor well is disposed within the semiconductor body and is electrically isolated from the memory transistor well. A memory transistor includ ...