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Kenneth Chenghao Lin, Haoqi Ren: Processor-cache system and method. SHANGHAI XIN HAO MICRO ELECTRONICS, Anova Law Group PLLC, June 2, 2015: US09047193 (102 worldwide citation)

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit an ...


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Kenneth Chenghao Lin, Haoqi Ren: Processor-cache system and method. SHANGHAI XIN HAO MICRO ELECTRONICS, Anova Law Group PLLC, February 16, 2016: US09262164

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit an ...


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Lin Kenneth Chenghao: Processor-cache system and method. SHANGHAI XIN HAO MICRO ELECTRONICS, August 4, 2011: WO/2011/091768

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit an ...


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PROCESSOR-CACHE SYSTEM AND METHOD. SHANGHAI XIN HAO MICRO ELECTRONICS, May 2, 2013: US20130111137-A1

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit an ...


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PROCESSOR-CACHE SYSTEM AND METHOD. August 20, 2015: US20150234660-A1

A digital system is provided. The digital system includes an execution unit, a level-zero (L0) memory, and an address generation unit. The execution unit is coupled to a data memory containing data to be used in operations of the execution unit. The L0 memory is coupled between the execution unit an ...