1
Martin Vorbach, Robert Münch: Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like). PACT, Kenyon & Kenyon, November 5, 2002: US06477643 (153 worldwide citation)

A method for processing data in a configurable unit having a multidimensional cell arrangement a switching table is provided, the switching table including a controller and a configuration memory. Configuration strings are transmitted from the switching table to a configurable element of the unit to ...


2
Martin Vorbach, Robert Munch: Process for automatic dynamic reloading of data flow processors (DFPs) and units with two or three-dimensional programmable cell architectures (FPGAs, DPGAs and the like). PACT, Kenyon & Kenyon, July 11, 2000: US06088795 (77 worldwide citation)

A method for processing data in a configurable unit having a multidimensional cell arrangement a switching table is provided, the switching table including a controller and a configuration memory. Configuration strings are transmitted from the switching table to a configurable element of the unit to ...


3
Martin Vorbach, Robert Münch: Process for automatic dynamic reloading of data flow processors (DFPS) and units with two- or three- dimensional programmable cell architectures (FPGAS, DPGAS, and the like). Pact XPP Technologies, Kenyon & Kenyon, April 11, 2006: US07028107 (52 worldwide citation)

A system for communication between a plurality of functional elements in a cell arrangement and a higher-level unit is described. The system may include, for example, a configuration memory arranged between the functional elements and the higher-level unit; and a control unit configured to move at l ...


4
Martin Vorbach, Robert Münch: Process for automatic dynamic reloading of data flow processors (DFPs) and units with two- or three-dimensional programmable cell architectures (FPGAs, DPGAs, and the like). Kenyon & Kenyon, October 26, 2010: US07822881 (8 worldwide citation)

In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurabl ...


5
Martin Vorbach, Robert Munch: Process for automatic dynamic reloading of data flow processors (DFPS) and units with two- or three-dimensional programmable cell architectures (FPGAS, DPGAS, and the like). PACT, Kenyon & Kenyon, May 15, 2003: US20030093662-A1

A system for communication between a plurality of functional elements in a cell arrangement and a higher-level unit is described. The system may include, for example, a configuration memory arranged between the functional elements and the higher-level unit; and a control unit configured to move at l ...


6
Martin Vorbach, Robert Munch: Process for automatic dynamic reloading of data flow processors (DFPs) and units with two- or three-dimensional programmable cell architectures (FPGAs, DPGAs, and the like. Kenyon & Kenyon, February 9, 2006: US20060031595-A1

In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurabl ...


7
Martin VORBACH, Robert MUNCH: Process for automatic dynamic reloading of data flow processors (dfps) and units with two- or three-dimensional programmable cell architectures (fpgas, dpgas and the like). Kenyon & Kenyon, June 18, 2009: US20090153188-A1

In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurabl ...


8
Martin Vorbach, Robert Munch: Process for automatic dynamic reloading of data flow processors (dfps) and units with two- or three-dimensional programmable cell architectures (fpgas, dpgas, and the like). Michelle M Carniaux Esq, Kenyon & Kenyon, June 4, 2009: US20090144485-A1

In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurabl ...