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Robert J Gove, Keith Balmer, Nicholas K Ing Simmons, Karl M Guttag: Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, May 18, 1993: US05212777 (371 worldwide citation)

There is disclosed a multiprocessor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memor ...


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James A Katzman, Joel F Bartlett, Richard M Bixler, William H Davidow, John A Despotakis, Peter J Graziano, Michael D Green, David A Greig, Steven J Hayashi, David R Mackie, Dennis L McEvoy, James G Treybig, Steven W Wierenga: Multiprocessor system. Tandem Computers Incorporated, Donald C Feix, October 14, 1980: US04228496 (317 worldwide citation)

A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by ei ...


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Marian H Beard, Perry A Caro, Jennifer B Hsiao, Kevin J Mackey, James G Sandman Jr, Gary R Steinbach, Donald R Woods: Data processor having a user interface display with metaphoric objects. Xerox Corporation, W Douglas Carothers Jr, February 6, 1990: US04899136 (309 worldwide citation)

A multiprocessor system comprises concurrent display of video data reflecting the operation of two processors in discrete portions of a single display screen with a user interface adapted for interaction with both processors. One processor controls the entire display while allocating a portion of th ...


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Robert J Gove, Karl M Guttag, Keith Balmer, Nicholas K Ing Simmons: Multi-processor with crossbar link of processors and memories and method of operation. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, November 28, 1995: US05471592 (279 worldwide citation)

There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the proc ...


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Nicholas K Ing Simmons, Karl M Guttag, Robert J Gove, Keith Balmer: Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, August 24, 1993: US05239654 (277 worldwide citation)

A multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The multiprocessor system includes several individual processors all having communication links to several memories. Additional instruction memories are dedicated individually as cache memories to pa ...


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Richard W Cary, Richard D Guyon: Version management system using plural control fields for synchronizing two versions of files in a multiprocessor system. Amdahl Corporation, Fliesler Dubb Meyer & Lovejoy, October 17, 1989: US04875159 (275 worldwide citation)

In a data processing system that stores a first and second version of a given data set, a method for synchronizing the first and second versions comprises steps of maintaining a sync-complete control field and a sync-in-progress control field in the inode of each of the first and second versions. Wr ...


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Robert A Alfieri: Apparatus and method for improved CPU affinity in a multiprocessor system. Data General Corporation, Robert L Dulaney, April 28, 1998: US05745778 (273 worldwide citation)

Closely related processing threads within a process in a multiprocessor system are collected into thread groups which are globally scheduled as a group based on the thread group structure's priority and scheduling parameters. The thread group structure maintains collective timeslice and CPU accounti ...


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Gary L Engel, Paul J Georgeson, Douglas R Mueller, John M Quernemoen, Bruce C Todd: Automatic power control system which automatically activates and deactivates power to selected peripheral devices based upon system requirement. Unisys Corporation, Charles A Johnson, Lawrence J Marhoefer, May 24, 1988: US04747041 (228 worldwide citation)

A selective, non-manual power controller provides the selective, non-manual power control of various components of a data processing equipment from and reports the power status of such components to a central location. As opposed to pass power controllers which were limited to powering on or off all ...



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