1
Leslie D Kohn, Kunle A Olukotun, Michael K Wong: Multi-core multi-thread processor. Sun Microsystems, Martine Penilla & Gencarella, April 24, 2007: US07209996 (43 worldwide citation)

In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plu ...


2
Kunle A Olukotun: Multi-core multi-thread processor. Oracle America, Martine Penilla & Gencarella, January 18, 2011: US07873785 (9 worldwide citation)

A processor is provided. The processor includes at least two cores. The at least two cores have a first level cache memory and are multi-threaded. A crossbar is included. A plurality of cache bank memories in communication with the at least two cores through the crossbar is provided. Each of the plu ...


3
Kunle A Olukotun: Request arbitration in multi-core processor. Sun Microsystems, Martine Penilla & Gencarella, November 7, 2006: US07133950 (7 worldwide citation)

A processor chip is provided. The processor chip includes a plurality of processing cores, where each of the processing cores are multi-threaded. The plurality of processing cores are located in a center region of the processor chip. A plurality of cache bank memories are included. A crossbar enabli ...


4
Olukotun Kunle A: Multi-core multi-thread processor crossbar architecture. Sun Microsystems, March 16, 2005: TW200511035 (5 worldwide citation)

A processor chip is provided. The processor chip includes a plurality of processing cores where each of the processing cores being multi-threaded. The plurality of processing cores are located in a center region of the processor chip. A plurality of cache bank memories are included. A crossbar enabl ...


5
Olukotun Kunle A: Multi-core multi-thread processor. Sun Microsystems, July 16, 2005: TW200523802 (5 worldwide citation)

A processor is provided. The processor includes at least two cores. The at least two cores have a first level cache memory and are multi-threaded. A crossbar is included. A plurality of cache bank memories in communication with the at least two cores through the crossbar is provided. Each of the plu ...


6
Olukotun Kunle A: Multi-core multi-thread processor crossbar architecture. Sun Microsystems, Olukotun Kunle A, GENCARELLA Michael L, March 3, 2005: WO/2005/020066 (4 worldwide citation)

A processor chip is provided. The processor chip includes a plurality of processing cores where each of the processing cores being multi-threaded. The plurality of processing cores are located in a center region of the processor chip. A plurality of cache bank memories are included. A crossbar enabl ...


7
Leslie D Kohn, KunIe A Olukotun, Michael K Wong: Multi-core multi-thread processor. Oracle America, Martine Penilla & Gencarella, January 4, 2011: US07865667 (1 worldwide citation)

In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plu ...


8
Olukotun Kunle A: Cache crossbar arbitration. Sun Microsystems, Olukotun Kunle A, GENCARELLA Michael L, March 3, 2005: WO/2005/020079 (1 worldwide citation)

A processor chip is provided. The processor chip includes a plurality of processing cores, where each of the processing cores are multi-threaded. The plurality of processing cores are located in a center region of the processor chip. A plurality of cache bank memories are included. A crossbar enabli ...


9
Kohn Leslie D, Olukotun Kunle A, Wong Michael K: Multi core multi thread processor and method and apparatus utilizing a multi core multi thread processor. Sun Microsystems, September 21, 2005: TWI240163 (1 worldwide citation)

In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plu ...


10
Kunle A Olukotun: Multi-core multi-thread processor crossbar architecture. Oracle America, Martine Penilla Group, June 11, 2013: US08463996

A processor chip is provided. The processor chip includes a plurality of processing cores where each of the processing cores being multi-threaded. The plurality of processing cores are located in a center region of the processor chip. A plurality of cache bank memories are included. A crossbar enabl ...