1
Ota Kazunobu, Sayama Hirokazu, Oda Hidekazu: Method of manufacturing semiconductor device with offset sidewall structure. Mitsubishi Electric Corporation, August 21, 2003: TW548799 (42 worldwide citation)

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


2
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Technology, Oblon Spivak McClelland Maier & Neustadt P C, May 12, 2009: US07531402 (10 worldwide citation)

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


3
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Technology, Oblon Spivak McClelland Maier & Neustadt P C, May 22, 2007: US07220637 (10 worldwide citation)

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


4
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Technology, Oblon Spivak McClelland Maier & Neustadt P C, July 21, 2009: US07563663 (2 worldwide citation)

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


5
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Electronics Corporation, Oblon Spivak McClelland Maier & Neustadt L, April 9, 2013: US08415213

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


6
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Electronics Corporation, Oblon Spivak McClelland Maier & Neustadt L, September 24, 2013: US08541272

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


7
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Electronics Corporation, Oblon Spivak McClelland Maier & Neustadt L, February 4, 2014: US08642418

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


8
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Electronics Corporation, Oblon Spivak McClelland Maier & Neustadt L, October 14, 2014: US08859360

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


9
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. Renesas Electronics Corporation, Oblon McClelland Maier & Neustadt L, March 24, 2015: US08987081

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


10
Kazunobu Ota, Hirokazu Sayama, Hidekazu Oda: Method of manufacturing semiconductor device with offset sidewall structure. RENESAS ELECTRONICS CORPORATION, Oblon McClelland Maier & Neustadt L, December 15, 2015: US09214464

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...