1
Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura: Method for manufacturing semiconductor device. Semiconductor Energy Laboratory, Sixbey Friedman Leedom & Ferguson, April 4, 1995: US05403772 (395 worldwide citation)

A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum ...


2
Hisahi Ohtani, Akiharu Miyanaga, Hongyong Zhang, Naoaki Yamaguchi: Method for manufacturing semiconductor device. Semiconductor Energy Laboratory, Gerald J Ferguson Jr, Jeffrey L Costellia, Sixbey Friedman Leedom & Ferguson PC, February 25, 1997: US05605846 (201 worldwide citation)

A process for manufacturing a semiconductor device, particularly a thin film transistor, by using a crystalline silicon film having excellent characteristics. The process comprises forming a silicon nitride film and an amorphous silicon film in contact thereto, introducing a catalyst element capable ...


3
Kazuo Maeda: Method for reforming base surface, method for manufacturing semiconductor device and equipment for manufacturing the same. Semiconductor Process Laboratory, Lorusso & Loud, February 4, 2003: US06514884 (141 worldwide citation)

The present invention relates to a method for reforming a surface of a base layer before thin film deposition, wherein a base thermal SiO


4
Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Yasuko Yoshida, Norio Suzuki, Masayuki Kojima, Kota Funayama: Method for manufacturing semiconductor device. Hitachi, Beall Law Offices, July 18, 2000: US06090684 (139 worldwide citation)

A shallow groove isolation structure (SGI) electrically insulates adjoining transistors on a semiconductor substrate. A pad oxide film is formed on the semiconductor substrate and an oxidation inhibition film is formed on the pad oxide film. Parts of the oxide inhibition film and pad oxide film are ...


5
Yasuyuki Arai, Yuko Tachimura, Mai Akiba: Inspection system, inspection method, and method for manufacturing semiconductor device. Semiconductor Energy Laboratory, Cook Alex McFarron Manzo Cummings & Mehler, September 26, 2006: US07112952 (137 worldwide citation)

The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present in ...


6
Yasuhiko Takemura, Satoshi Teramoto: Method for manufacturing semiconductor device with removable spacers. Semiconductor Energy Laboratory, Gerald J Fergsuon Jr, Jeffrey L Costellia, Sixbey Friedman Leedom & Ferguson, February 17, 1998: US05719065 (136 worldwide citation)

A thin film transistor of the present invention has an active layer including at least source, drain and channel regions formed on an insulating surface. A high resistivity region is formed between the channel region and each of the source and drain regions. A film capable of trapping positive charg ...


7
Yasuyuki Arai, Yuko Tachimura, Mai Akiba: Inspection system, inspection method, and method for manufacturing semiconductor device. Semiconductor Energy Laboratory, Cook Alex McFarron Manzo Cummings & Mehler, October 2, 2007: US07276929 (130 worldwide citation)

The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present in ...


8
Shuichi Kameyama: Method for manufacturing semiconductor device. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett & Dunner, September 18, 1984: US04472240 (95 worldwide citation)

A method for forming a groove in a semiconductor substrate is disclosed. The groove is formed in two steps. In the first step, a first shallow groove is formed in the semiconductor substrate and then a first mask pattern is selectively formed on the wall of the first groove. A second groove is forme ...


9
Hideaki Hirabayashi, Masatoshi Higuchi: Copper-based metal polishing solution and method for manufacturing semiconductor device. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, November 19, 1996: US05575885 (90 worldwide citation)

Disclosed is a copper-based metal polishing solution which hardly dissolves a Cu film or a Cu alloy film when the film is dipped into the solution, and has a dissolution velocity during polishing several times higher than that during dipping. This copper-based metal polishing solution contains at le ...


10
Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka: Method for manufacturing semiconductor device. Semiconductor Energy Laboratory, Eric J Robinson, Robinson Intellectual Property Law Office P C, August 7, 2012: US08236635 (87 worldwide citation)

In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is tran ...