Yu Ping Cheng, David Hitz: High-performance non-volatile RAM protected write cache accelerator system employing DMA and data transferring scheme. Auspex Systems, Fliesler Dubb Meyer & Lovejoy, December 23, 1997: US05701516 (169 worldwide citation)

A data storage system is coupled to a host computer system for the transfer of data between the host and a plurality of data storage devices. The data storage devices are coupled to a plurality of data transfer channels with each data storage channel be coupled to at least a respective one of the da ...

Cecil H Kaplinsky: Memory access controller. Signetics Corporation, Jack E Haken, James J Cannon Jr, May 26, 1987: US04669043 (145 worldwide citation)

The data processing system of the invention comprises a processor, a memory access controller and a memory hierarchy. The memory access controller is placed between the processor and the memory hierarchy and controls access thereto. The memory access controller comprises a cache controller and a tra ...


Takeshi Funahashi, Yoshikatsu Niwa: Optical disc apparatus. Sony Corporation, Philip M Shaw Jr, Limbach & Limbach, June 18, 1996: US05528571 (136 worldwide citation)

A disc driving apparatus using SSA (sector slipping algorithm) for defective sectors and LRA (linear replacement algorithm). This disc driving apparatus is simple in arrangement and can reproduce data at high speed in a simple processing on the basis of attribute data representing whether a defectiv ...

Masakazu Suzuoki, Takeshi Yamazaki: Memory protection system and method for computer architecture for broadband networks. Sony Corporation Entertainment, Lerner David Littenberg Krumholz & Mentlik, February 25, 2003: US06526491 (134 worldwide citation)

A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of proces ...

Linda J Rankin, Joseph Bonasera, Nitin Y Borkar, Linda C Ernst, Suvansh K Kapur, Daniel A Manseau, Frank Verhoorn: Method and apparatus for providing remote memory access in a distributed memory multiprocessor system. Intel Corporation, Blakely Sokoloff Taylor & Zafman, March 18, 1997: US05613071 (130 worldwide citation)

A massively parallel data processing system is disclosed. This data processing system includes a plurality of nodes, with each node having at least one processor, a memory for storing data, a processor bus that couples the processor to the memory, and a remote memory access controller coupled to the ...

Gideon Frieder, David T Hughes, Mark H Kline, John T Liebel Jr, David P Meier, Edward A Wolff: Data processing system. Nanodata Computer Corporation, Christel Bean & Linihan, July 2, 1985: US04527237 (127 worldwide citation)

A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type ...

Nicholas Derchak: Shared direct memory access controller. Sperry Rand Corporation, B Franklin Griffin Jr, E T Battjer, Sheldon Kapustin, January 3, 1978: US04067059 (110 worldwide citation)

A microprocessor system includes a microprocessor, a memory, and one or more direct memory access controllers, all connected to a common system bus which includes a system address bus and a system data bus. At least one of the direct memory access controllers is shared by a plurality of subsystem de ...

Koh Matsushima, Yutaka Wakasu: Memory access controller. NEC Corporation, Laff Whitesel Conte & Saret, January 6, 1998: US05706482 (110 worldwide citation)

In order to write data flowing in continuously into an image memory consisting of a single port RAM without lack and to read data out of the image memory continuously without lack in parallel, a memory access processor of the invention comprises;

Thai H Pham, Pratik M Mehta, Michael S Quimby: Direct memory access controller with channel width configurability support. Advanced Micro Devices, Akin Gump Strauss Hauer & Feld, December 10, 2002: US06493803 (110 worldwide citation)

A direct memory access (DMA) controller provides seven DMA channels configurable for a PC/AT compatible mode or an enhanced mode. In an enhanced mode of the DMA controller, three DMA master channels on a master DMA controller and a DMA channel on a slave DMA controller are individually configurable ...