1
G Glenn Henry, Arturo Martin de Nicolas, Terry Parks: Mechanism in a microprocessor for executing native instructions directly from memory. IP First, Richard K Huffman, James W Huffman, January 9, 2007: US07162612 (4 worldwide citation)

An microprocessor apparatus and method are provided for executing native instructions directly from memory. The apparatus includes instruction translation logic and bypass logic. The instruction translation logic retrieves macro instructions provided via an external instruction bus, and translates e ...


2
Henry G Glenn, Martin de Nicolas Arturo, Parks Terry: Mechanism in a microprocessor for executing native instructions directly from memory. Ip First, July 27, 2005: EP1557754-A2 (3 worldwide citation)

An microprocessor apparatus and method are provided for executing native instructions directly from memory. The apparatus includes instruction translation logic and bypass logic. The instruction translation logic retrieves macro instructions provided via an external instruction bus, and translates e ...


3
Henry G Glenn, Martin de Nicolas Arturo, Parks Terry: Mechanism in a microprocessor for executing native instructions directly from memory. Ip First, July 21, 2007: TWI284281 (3 worldwide citation)

An apparatus and method for providing early instruction results is disclosed. Early execution logic, comprising an enhanced address generator located in an address generation stage of the microprocessor pipeline, receives input operands and generates early results of instructions reaching the addres ...


4
G Glenn Henry, Arturo Martin de Nicolas, Terry Parks: Mechanism in a microprocessor for executing native instructions directly from memory. IP First, Huffman Law Group PC, August 5, 2004: US20040153630-A1

An microprocessor apparatus and method are provided for executing native instructions directly from memory. The apparatus includes instruction translation logic and bypass logic. The instruction translation logic retrieves macro instructions provided via an external instruction bus, and translates e ...


5
Henry G Glenn, Martin de Nicolas Arturo, Parks Terry: Mechanism in a microprocessor for executing native instructions directly from memory and method. Ip First, zhou guocheng, June 29, 2005: CN200510004655

The apparatus disclosed includes instruction translation logic and bypass logic. The instruction translation logic retrieves macro instructions provided via an external instruction bus, and translates each of the macro instructions into associated native instructions for execution. If a first form o ...


6

7