61
Anthony L Coyle: Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly. Texas Instruments Incorporated, Michael K Skrehot, Wade James Brady III, Frederick J Telecky Jr, February 11, 2003: US06518089 (79 worldwide citation)

A robust, low inductance electronic package for small area semiconductor chips is provided which includes a flexible polymer film having electronic circuitry on one or more major surfaces, a bumped flip chip integrated circuit attached to the first surface, an array of solder balls to the second sur ...


62
Timothy J Brosnihan, Nesbitt W Hagood IV, Jasper Lodewyk Steyn, Jignesh Gandhi, John J Fijol, Richard S Payne, Roger Barton: Display apparatus and methods for manufacture thereof. Pixtronix, Ropes & Gray, July 29, 2008: US07405852 (78 worldwide citation)

Display devices incorporating shutter-based light modulators are disclosed along with methods of manufacturing such devices. The methods are compatible with thin-film manufacturing processes known in the art and result in displays having lower power-consumption.


63
Hsin Hung Tu: USB connector structure with protection means. AIPTEK International, Troxell Law Office PLLC, October 26, 2004: US06808400 (77 worldwide citation)

The present invention relates to a USB structure with a protection device, especially applying to a USB connector structure without traditional cap but still with protection function. The present invention adopts simple mechanism, spring and positioning structure, pivotal structure and rotational st ...


64
James Schroeder: Personalized fit and functional designed medical prostheses and surgical instruments and methods for making. Brian S Steinberger, Law Offices of Brian S Steinberger P A, June 4, 2013: US08457930 (76 worldwide citation)

The present invention provides methods, devices, systems, and instruments related to medical implants and surgical instruments produced to precisely fit individual subjects. In particular, the present invention utilizes a combination of medical imaging, quantitative image analysis, CAD, CAM, and add ...


65
Tapesh Yadav, Ming Au, Bijan Miremadi, John Freim, Yuval Avniel, Roger Dirstine, John Alexander, Evan Franke: Applications and devices based on nanostructured non-stoichiometric substances. NanoProducts Corporation, Stuart Langley, Hogan & Hartson, August 19, 2003: US06607821 (76 worldwide citation)

Nanostructured non-equilibrium, non-stoichiometric materials and device made using the nanonostructured non-equilibrium non-stoichiometric materials are provided. Applications and methods of implementing such devices and applications are also provided. More specifically, the specifications teach the ...


66
Paul P Mehta, Jerry William Evans, Arthur L Ludwig, Rahul Chhabra: Method and system for estimating manufacturing costs. American Technology & Services, Dinsmore & Shohl, November 6, 2007: US07292965 (75 worldwide citation)

A method and system estimates manufacturing costs for conventional and advanced materials and processes based on process-oriented approach. A computer system input display for selecting one or more designs and one or more design parameters. Cost models are based upon process-oriented manufacturing c ...


67
Satwinder Malhi, Taylor R Efland, Oh Kyong Kwon: Triple diffused lateral resurf insulated gate field effect transistor compatible with process and method. Texas Instruments Incorporated, Jacqueline J Garner, Richard L Donaldson, William E Hiller, September 13, 1994: US05346835 (73 worldwide citation)

A triple-diffused lateral RESURF transistor (55,57) uses a threshold voltage adjust implant (52, 54) in conjunction with a thinner gate oxide (64) to yield a device which is more compatible with CMOS VLSI manufacturing processes and which delivers better performance characteristics than more convent ...


68
Taber H Smith, Vikas Mehrotra, David White: Characterization and reduction of variation for integrated circuits. Cadence Design Systems, Vista IP Law Group, August 16, 2011: US08001516 (70 worldwide citation)

A method and system are described to reduce process variation as a result of the semiconductor processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to modify the design and manufacture of integrated circuits.


69
Sammy Mok, Fu Chiung Chong: Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies. NanoNexus, Michael A Glenn, Glenn Patent Group, November 9, 2004: US06815961 (70 worldwide citation)

Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several e ...


70
Masaaki Asano, Yoshiaki Tsuruoka, Hisao Tanabe: Plasma display device with auxiliary partition walls, corrugated, tiered and pigmented walls. Dai Nippon Printing, Morgan & Finnegan, December 28, 1999: US06008582 (70 worldwide citation)

A plasma display panel has a front plate (10) and a back plate (3) disposed in parallel and opposite to each other, and spaced a predetermined distance apart from each other by partition walls (1a, 1b, 1c). The partition walls (1a, 1b, 1c) define discharge spaces (2) each having a plurality of disch ...



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