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Kiran K Gunnam, Gwan S Choi: Low density parity check decoder for regular LDPC codes. Texas A&M University System, Conley Rose P C, January 22, 2013: US08359522 (39 worldwide citation)

A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message ...


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Kiran Kumar Gunnam, Gwan S Choi: Low density parity check decoder for regular LDPC codes. Texas A&M University System, Conley Rose P C, February 18, 2014: US08656250 (4 worldwide citation)

A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message ...


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Kiran K GUNNAM, Gwan S CHOI: Low density parity check decoder for regular ldpc codes. Texas A&M University System, Conley Rose PC, David A Rose, November 6, 2008: US20080276156-A1

A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message ...


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LOW DENSITY PARITY CHECK DECODER FOR REGULAR LDPC CODES. Texas A&M University System, April 18, 2013: US20130097469-A1

A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message ...


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LOW DENSITY PARITY CHECK DECODER. The Texas A&M University System, March 30, 2017: US20170093429-A1

A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. T ...


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Low Density Parity Check Decoder. The Texas A&M University System, February 14, 2019: US20190052288-A1

A method and system for decoding low density parity check (“LDPC”) codes. A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes decoding circuitry configured to process blocks of an LDPC matrix. The decoding circuitry includes a control unit that con ...