1
James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr: Integrated circuit stacking system and method. Staktek Group, Andrews Kurth, J Scott Denko, October 18, 2005: US06956284 (61 worldwide citation)

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


2
James W Cady, James Wilder, David L Roper, Russell Rapport, James Douglas Wehrly Jr, Jeffrey Alan Buchle: Integrated circuit stacking system and method. Staktek Group, Andrews Kurth L, September 6, 2005: US06940729 (26 worldwide citation)

The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leade ...


3
Rapport Russell, Cady James W, Wilder James, Roper David L, Wehrly James Douglas Jr, Buchle Jeff: Memory expansion and integrated circuit stacking system and method. Staktek Group, Rapport Russell, Cady James W, Wilder James, Roper David L, Wehrly James Douglas Jr, Buchle Jeff, SCHEINBERG Michael O, December 16, 2004: WO/2004/109802 (23 worldwide citation)

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


4
James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr: Integrated circuit stacking system and method. Entorian Technologies, Fish & Richardson P C, April 28, 2009: US07524703 (3 worldwide citation)

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


5
James W Cady, James Wilder, David L Roper, Russell Rapport, James Douglas Wehrly Jr, Jeffrey Alan Buchle: Integrated circuit stacking system and method. Staktek Group, Fish & Richradson P C, J Scott Denko, February 26, 2008: US07335975 (2 worldwide citation)

The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leade ...


6
Russell Rapport, James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr, Jeff Buchle: Memory expansion and integrated circuit stacking system and method. Entorian Technologies, Fish & Richardson P C, June 2, 2009: US07542304 (1 worldwide citation)

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


7
James W Cady, James Wilder, David L Roper, Russell Rapport, James Douglas Wehrly, Jeffrey Alan Buchle: Integrated circuit stacking system and method. Staktek Group, J Scott Denko, May 1, 2003: US20030081392-A1 (1 worldwide citation)

The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leade ...


8
Cady James, Wilder James, Roper David, Wehrly Jr Douglas: Integrated circuit stacking system and method. Staktek Group, December 13, 2006: EP1730774-A2

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


9
James W Cady, James Wilder, David L Roper, James Douglas Wehrly: Integrated circuit stacking system and method. Staktek Group, J Scott Denko, Andrews Kurth, September 23, 2004: US20040183183-A1

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


10
James W Cady, James Wilder, David L Roper, James Douglas Wehrly: Integrated circuit stacking system and method. Staktek Group, Nathan H Calvert, Andrews & Kurth, November 25, 2004: US20040235222-A1

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...