1
Martin Vorbach, Robert Munch: I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures. PACT, Kenyon & Kenyon, September 12, 2000: US06119181 (99 worldwide citation)

A uniform bus system is provided which operates without any special consideration by a programmer. Memories and peripheral may be connected to this bus system without any special measures. Likewise, units may be cascaded with the help of the bus system. The bus system combines a number of internal l ...


2
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures. PACT, Kenyon & Kenyon, January 8, 2002: US06338106 (95 worldwide citation)

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


3
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures. PACT, Kenyon & Kenyon, January 28, 2003: US06513077 (66 worldwide citation)

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


4
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures. PACT XPP Technologies, Kenyon & Kenyon, April 13, 2004: US06721830 (65 worldwide citation)

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


5
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures. Pact XPP Technologies, Kenyon & Kenyon, January 19, 2010: US07650448 (40 worldwide citation)

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


6
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPs and units with two-or multi-dimensional programmable cell architectures. Pact XPP Technologies, Kenyon & Kenyon, July 10, 2007: US07243175 (1 worldwide citation)

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


7
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures. Kenyon & Kenyon, June 5, 2012: US08195856

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


8
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures. Kenyon & Kenyon, March 1, 2011: US07899962

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


9
Martin Vorbach, Robert Münch: I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures. Pact XPP Technologies, Kenyon & Kenyon, February 26, 2008: US07337249

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...


10
Martin Vorbach, Robert Munch: I/O and memory bus system for DFPs and units with two-or multi-dimensional programmable cell architectures. Kenyon & Kenyon, October 7, 2004: US20040199688-A1

A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (fo ...