Andrew W Wilson Jr, Steven J Frank: Hierarchical cache memory system and method. Encore Computer Corporation, Henry D Pahl Jr, July 5, 1988: US04755930 (143 worldwide citation)

A caching system for a shared bus multiprocessor which includes several processors each having its own private cache memory. Each private cache is connected to a first bus to which a second, higher level cache memory is also connected. The second, higher level cache in turn is connected either to an ...


Taizo Sato: Hierarchical cache memory system and method for controlling data coherency between a primary and a secondary cache. Fujitsu, Staas & Halsey, October 27, 1998: US05829024 (12 worldwide citation)

A hierarchical memory system having a cache memory for storing a portion of data stored in a main memory. The cache memory is divided into hierarchically ordered primary and secondary cache memories. The primary cache memory being connected to a processor. The larger secondary cache memory being con ...