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Bernard J New: Field programmable gate array with mask programmable I/O drivers. Xilinx, E Eric Hoffman Esq, Edel M Young, June 5, 2001: US06242945 (90 worldwide citation)

A field programmable gate array (FPGA) having a plurality of configurable logic blocks (CLBs). Each of the CLBs includes programmable interconnect resources, a field programmable configurable logic element (CLE) circuit and a corresponding non-field programmable gate array. The programmable intercon ...


2
Bernard J New: Field programmable gate array with mask programmable I/O drivers. Xilinx, Edel M Young, E Eric Hoffman Esq, July 18, 2000: US06091262 (32 worldwide citation)

A field programmable gate array (FPGA) having a plurality of configurable logic blocks (CLBs). Each of the CLBs includes programmable interconnect resources, a field programmable configurable logic element (CLE) circuit and a corresponding non-field programmable gate array. The programmable intercon ...