41
William F Bruckert, Thomas D Bissett: Dual zone, fault tolerant computer system with error checking in I/O writes. Digital Equipment Corporation, Finnegan Henderson Farabow Garrett and Dunner, April 2, 1991: US05005174 (41 worldwide citation)

A fault tolerant computer system having a first processing system which includes a first data processor for executing a series of data processing instructions. A first data output terminal outputs data from the first processing system. A second processing system, substantially identical to the first ...


42
William F Bruckert, Thomas D Bissett, Mitchell O Norcross, Kenneth A Ward: Interface of non-fault tolerant components to fault tolerant system. Digital Equipment Corporation, Finnegan Henderson Farabow Garrett & Dunner, April 10, 1990: US04916704 (40 worldwide citation)

A fault tolerant computer system includes a fault tolerant data processing module which has means for detecting and correcting errors in the operation of the data processing module to maintain a high degree of data integrity. Data transmission control devices control the transmission of all data to ...


43
Paul R Back, Paul R Carlin, Joseph M Lamb: Clock signal generation arrangement including digital noise reduction circuit for reducing noise in a digital clocking signal. Stratus Computer, Richard A Jordan, September 24, 1996: US05559459 (38 worldwide citation)

A clock signal generation arrangement for generating clocking signals for use in a fault-tolerant computer system generates a timing signal in response to a common clock signal. The clock signal generation arrangement comprises a system clock signal generator and a clock signal recovery circuit inte ...


44
Thomas C Bressoud, John E Ahern, Kenneth P Birman, Robert C B Cooper, Bradford B Glade, Fred B Schneider, John D Service: Transparent fault tolerant computer system. Stratus Computer, Cesari & McKenna, October 19, 1999: US05968185 (36 worldwide citation)

In a fault-tolerant computer system, a primary replica supervisor is interposed between an operating system and a primary replica of an application program being executed by a primary processor. An object-code editor locates calls to the operating system and loops in the application program and inse ...


45
Barry J Gleeson: Fault tolerant computer system with provision for handling external events. Unisys Corporation, Nathan Cass, Mark T Starr, November 8, 1994: US05363503 (36 worldwide citation)

A fault tolerant computer system employing primary tasks and corresponding backup tasks. The system operates to provide fault tolerant operation even where uncontrolled external events may occur whose time of occurrence may affect task performance. For this purpose, external event data is stored for ...


46
Stephen Fuchs, Andrew J Wardrop: Non-interrupting power control for fault tolerant computer systems. General Dynamics Information Systems, William J Kubida, Stuart T Holland & Hart Langley, July 13, 1999: US05923830 (36 worldwide citation)

A non-intrusive power control for a fault tolerant computer system which uses redundant voting at the hardware clock level. The computer includes three or more commercial central processing units (CPUs) operating synchronously. Outputs to system memory and system bus are voted by a radiation toleran ...


47
Jack J Stiffler: Remote checkpoint memory system and protocol for fault-tolerant computer system. Texas Micro, Wolf Greenfield & Sacks P C, September 28, 1999: US05958070 (33 worldwide citation)

A mechanism for maintaining a consistent, periodically updated state in main memory without constraining normal computer operation is provided, thereby enabling a computer system to recover from faults without loss of data or processing continuity. In this invention, a first computer includes a proc ...


48
Koji Matsuda, Soichi Takaya, Yoshihiro Miyazaki, Kenichi Kurosawa, Shinichiro Yamaguchi, Sako Ishikawa, Akira Yamagiwa, Masao Inoue, Kenji Kashiwagi: Uninterruptible clock supply apparatus for fault tolerant computer system. Hitachi, Kenyon & Kenyon, December 22, 1998: US05852728 (33 worldwide citation)

The present invention concerns clock source switchover between dual clock sources in the event of failure of any of them without affecting the clock output in the dual system, thereby preventing malfunctioning of processors therein. In the fault tolerant computer system of the invention, each of the ...


49
Bruckert William F, Bissett Thomas D, Mazur Dennis, Munzer John, Bernaby Frank, Bhatia Jay H: Fault tolerant computer system with fault isolation and repair.. Digital Equipment, March 8, 1989: EP0306244-A2 (33 worldwide citation)

A fault tolerant computer system has a central processing system which includes at least one set of data pathways, and executes a series of data processing instructions including the transfer of messages along the plurality of data pathways. At least one set of transaction data storage devices are c ...


50
Jack J Stiffler: Main memory system and checkpointing protocol for fault-tolerant computer system using an exclusive-or memory. Texas Micro, Wolf Greenfield & Sacks P C, May 12, 1998: US05751939 (32 worldwide citation)

A mechanism for returning a computer system to a consistent, periodically updated state in main memory without constraining normal computer operation is provided, thereby enabling a computer system to recover from faults without loss of data or processing continuity. In a typical computer system, a ...