1
Te Long Chiu, Jih Chang Lien: Electrically programmable floating gate semiconductor memory device. Texas Instruments Incorporated, John G Graham, March 15, 1983: US04376947 (66 worldwide citation)

An N-channel, double level poly, MOS read only memory or ROM array is electrically programmable by floating gates positioned beneath control gates formed by row address lines. The cells may be electrically programmed by applying selected voltages to the source, drain, control gate and substrate; the ...


2
Te Long Chiu, Jih Chang Lien: Electrically programmable floating gate semiconductor memory device. Texas Instruments Incorporated, John G Graham, August 21, 1984: US04467453 (37 worldwide citation)

An N-channel, double level poly, MOS read only memory or ROM array is electrically programmable by floating gates positioned beneath control gates formed by row address lines. The cells may be electrically programmed by applying selected voltages to the source, drain, control gate and substrate; the ...


3
Te Long Chiu, Jih Chang Lien: Electrically programmable floating gate semiconductor memory device. Texas Instruments Incorporated, John G Graham, May 7, 1985: US04514897 (23 worldwide citation)

An N-channel, double level poly, MOS read only memory or ROM array is electrically programmable by floating gates positioned beneath control gates formed by row address lines. The cells may be electrically programmed by applying selected voltages to the source, drain, control gate and substrate; the ...