Michael Seigman Peppler, Johannes Cornelis Wilhelmus Bakermans: Cable harness assembly and electrical testing machine. AMP Incorporated, Russell J Egan, September 5, 1978: US04110880 (33 worldwide citation)

An assembly apparatus is disclosed for manufacturing cable harnesses having a measured length of a multi-conductor flat flexible cable terminated by at least two electrical connectors. The assembly apparatus includes a conductor testing and cable cutting station, a connector crimp termination statio ...

Lee D Whetsel: Process of testing integrated circuit dies on a wafer. Texas Instruments Incorporated, Lawrence J Bassuk, Richard L Donaldson, April 4, 2000: US06046600 (32 worldwide citation)

A semiconductor wafer has integrated circuit dies formed in an array of rows and columns. Selector circuits occur in the areas between the dies and are electrically connected to the individual dies for selecting between a functional mode and a bypass mode for testing. Probe areas are formed on the p ...

Peter J Morgan, Robert O Miller: Semiconductor chip production and testing processes. Rockwell International Corporation, Bruce C Lutz, V Lawrence Sewell, H Fredrick Hamann, October 30, 1990: US04967146 (31 worldwide citation)

Precisely controlled grooves are formed in a semiconductor wafer as part of a total photolithographic process of producing the circuitry and the V-grooves for precise registration of the circuitry relative the edges of the individual chips of the wafer. The same registration facilitates automated el ...

Floyd F Schemmel: Adjustable probe for probe assembly. Texas Instruments Incorporated, B Peter Barndt, James T Comfort, Melvin Sharp, November 27, 1990: US04973903 (31 worldwide citation)

An adjustable probe to be utilized in probe card technology during the multiprobe electrical testing of integrated circuits. The adjustable probe includes a pair of slots for expansion/contraction and adjustment to obtain a high degree of planarization and placement accuracy of the probe needle.

Martin J Edwards: Electronic drive circuits for active matrix devices, and a method of self-testing and programming such circuits. U S Philips Corporation, Steven R Biren, November 7, 1995: US05465053 (31 worldwide citation)

A shift register or other electronic drive circuit, for an LCD or other active matrix device includes a series of circuit blocks each having redundancy in the form of parallel circuit paths. When the circuit is turned on, self-testing and redundancy selection is carried out by individual test and co ...

Charles A Tucci: Mechanically self-sealing closure. Cordis Corporation, Kenway & Jenney, October 30, 1984: US04479489 (30 worldwide citation)

Disclosed is a plug or closure for sealing the electrical terminal block of a cardiac pacing device from contact with body fluids while allowing access to the terminal block when the closure is in place. The closure is made of an elastomeric material and includes an upper surface containing a first ...

Yoshio Saito, James C Lau, Steven S Chan, Richard P Malmgren: On-wafer integrated circuit electrical testing. TRW, August 9, 1994: US05336992 (28 worldwide citation)

An electrical testing device is provided for testing integrated circuits located on a wafer. The testing device employs a multi-layer test circuit having a plurality of contacts for contacting the integrated circuits on a wafer. The layers of the test circuit are embedded in a flexible, supportive d ...

Stephen D Collier, Wayne E Hughes: Electrical testing device. Richard C Litman, November 27, 2001: US06323652 (27 worldwide citation)

An electrical testing device for determining the continuity between ground terminals of an electrical power cord and determining the electrical grounding of an electrical power tool. The electrical testing device can also be configured to determine the proper polarity on each of the hot, negative, a ...

Anthony J Smith, Timothy J Sheppard: Electrical testing apparatus and methods. Racal Automation, Leydig Voit Osann Mayer & Holt, December 21, 1982: US04365334 (26 worldwide citation)

A system is disclosed for generating test data for testing logic circuits. It has a store storing a respective Logic List for each of the basic logic circuit types in the form of a list of logic states identifying terminals of the logic circuit to which specified data inputs are to be applied and te ...

Benjamin V Fasano, Hai P Longworth, Vincent P Peterson III, Anthony L Plachy, Robert N Wiggin: Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices. International Business Machines Corporation, Margaret A Pepper, Scully Scott Murphy & Presser, May 21, 2002: US06391669 (26 worldwide citation)

Multilayer substrates, are fabricated with the incorporation therein of non-destructive test structures utilized to provide visual and electrical test data to facilitate the ascertainment and assessment of potential electrical interface failures. Furthermore, there are provided embedded structures i ...

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