21
Robert Osann Jr, Shafy Eltoukhy: Methods and apparatuses for binning partially completed integrated circuits based upon test results. Lightspeed Semiconductor Corporation, Fliesler Dubb Meyer & Lovejoy, October 17, 2000: US06133582 (53 worldwide citation)

A gate array integrated circuit wafer is formed having M-N generic metal interconnection layers and having performance and/or electrical testing circuits which are operative using only the M-N generic metal interconnection layers. The performance and electrical testing circuits are located in the ac ...


22
De, Vries Dirk Kenneth: Test structure for combined electrical testing and voltage-contrast inspection. Koninklijke Philips Electronics, de, Vries Dirk Kenneth, PENNINGS Johannes, November 23, 2006: WO/2006/123281 (51 worldwide citation)

A test structure (32) for detecting the presence of defects in conductive features formed on integrated circuit topography, which is configured for both voltage contrast inspectability and electrical measurability. A comb- like structure comprising pairs of adjacent conductive lines (22) is provided ...


23
William M Beckenbaugh, William H Lytle, Bernard Berman: Method of forming contact pads for wafer level testing and burn-in of semiconductor dice. Motorola, Rennie William Dover, Harry A Wolin, January 14, 1997: US05593903 (50 worldwide citation)

A method of forming contact pads (140) that allows for wafer level testing and burn-in of semiconductor die (22). A plurality of semiconductor die (22) are formed upon a semiconductor wafer (20), each semiconductor die (22) having a plurality of bonding pads (78). A contact pad (140) is formed overl ...


24
David Pih: High density test connector for disk drives in a high volume manufacturing environment. International Business Machines Corporation, Noreen A Krall, Robert B Martin, January 23, 2001: US06177805 (45 worldwide citation)

A test connector for making electrical tests on a disk drive on a high volume manufacturing line. The test connector comprises a high density connector header for electrical connection to a disk drive electrical connector fixed to a printed circuit board (PCB) card having well-separated, large area ...


25
Martin G Buehler: Split-cross-bridge resistor for testing for proper fabrication of integrated circuits. The United States of America represented by the Administration of the United States National Aeronautics and Space Administration, Paul F McCaul, John R Manning, Thomas H Jones, May 7, 1985: US04516071 (45 worldwide citation)

An electrical testing structure and method whereby a test structure is fabricated on, e.g., a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels ...


26
Samuel S S Lim, Siew K Tan: Reusable carrier for burn-in/testing on non packaged die. Sunright, Morgan & Finnegan L, August 6, 1996: US05543725 (43 worldwide citation)

A re-usable carrier having a cavity for receiving unpackaged die with molded metallized probe heads to establish contact with the bond pads of the die, enabling the die to be functionally tested through the existing test systems. The novel carrier has metallized contacts for making electrical connec ...


27
Samuel S S Lim, Siew K Tan: Reusable carrier for burn-in/testing of non packaged die. Sunright, Morgan & Finnegan, June 25, 1996: US05530376 (43 worldwide citation)

A re-usable carrier having a cavity for receiving a packaged die with molded metallized probe heads to establish contact with the bond pads of the die, enabling the die to be functionally tested through the existing test systems. The novel carrier has metallized contacts for making electrical connec ...


28
Jonathon H Katz: Test pin. Teradyne, August 8, 1978: US04105970 (42 worldwide citation)

An electrical testing pin characterized by a crown with an inner contact area and a plurality of outer contact areas, the former extending longitudinally beyond the latter.


29
James E Byrum: IC carrier system. Albert L Gabriel, July 21, 1987: US04681656 (42 worldwide citation)

A method of laser-machining IC carrier bodies from a sheet ceramic blank, and the IC carrier products produced from such laser-machining. The ceramic blank, preferably of alumina or beryllia, is high temperature fired to permanently fix its size and shape prior to the laser-machining, permitting a m ...


30
Samuel S S Lim, Siew K Tan: Reusable carrier for burn-in/testing on non packaged die. Sunright, Morgan & Finnegan L, November 5, 1996: US05572140 (40 worldwide citation)

A re-usable carrier having a cavity for receiving unpackaged die with molded metallized probe heads to establish contact with the bond pads of the die, enabling the die to be functionally tested through the existing test systems. The novel carrier has metallized contacts for making electrical connec ...