1
Thomas Klein, Charles E Boettcher: Dynamic MOS RAM with storage cells having a mainly insulated first plate. National Semiconductor Corporation, Gail W Woodward, Paul J Winters, Michael J Pollock, October 2, 1984: US04475118 (23 worldwide citation)

An improved dynamic MOS RAM having a plurality of selection lines and data lines and a plurality of storage cells connected thereto, wherein each storage cell includes a storage capacitor having first and second plates, wherein the second plate is adapted to be coupled to a reference potential termi ...


2
Rustam Mehta, Stephen F Dreyer: Dynamic MOS RAM. Intel Corporation, Blakely Sokoloff Taylor & Zafman, July 26, 1977: US04038646 (18 worldwide citation)

An improved dynamic MOS RAM employing capacitive storage memory cells having a single active device per cell. The RAM includes several improved circuits and techniques which reduce power consumption and pattern sensitivity and which also provide a higher speed memory. Complementary input/output line ...


3
Hoffman Charles Robert, Kube Donald H: Peripheral circuitry for dynamic mos rams. Motorola, Rauner Vincent J, Hoffman Charles R, March 12, 1974: US3796893 (16 worldwide citation)

Improved circuits for a dynamic MOS RAM having a storage array of inverting storage cells, including an improved input buffer, an improved write circuit, and a sense circuit. The input buffer circuit includes a dynamic latch circuit clocked by the first clock complement signal and is compatible with ...


4
Hoffman Charles Robert, Kube Donald H: Peripheral circuitry for dynamic MOS rams. Motorola, Rauner Vincent P, Hoffman Charles R, February 25, 1975: US3868657 (8 worldwide citation)

Improved circuits for a dynamic MOS RAM having a storage array of inverting storage cells, including an improved input buffer, an improved write circuit, and a sense circuit. The input buffer circuit includes a dynamic latch circuit clocked by the first clock complement signal and is compatible with ...