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Bryan P Black, Marvin A Denman: Data processor with branch target address cache and method of operation. Motorola, Lee E Chastain, June 25, 1996: US05530825 (62 worldwide citation)

A data processor (10) has a BTAC (48) storing a number of recently encountered fetch address-target address pairs. Each pair also includes an offset tag identifying which one of a plurality of instructions indexed by the fetch address generated the entry. A branch unit (20) generates an execution ad ...


2
Bryan P Black, Marvin A Denman Jr, Seungyoon Peter Song: Data processor with branch target address cache and method of operation. Motorola, September 8, 1998: US05805877 (40 worldwide citation)

A data processor (10) has a BTAC (48) storing a number of recently encountered fetch address-target address pairs. A branch unit (20) generates a fetch address that depends upon a condition precedent and a received branch instruction. After executing each branch instruction, the branch unit predicts ...


3
Black Bryan P, Denman Marvin A Jr, Song Seungyoon Peter: Data processor with branch target address cache and method of operation.. Motorola, August 9, 1995: EP0666538-A2 (4 worldwide citation)

A data processor (10) has a BTAC (48) storing a number of recently encountered fetch address-target address pairs. A branch unit (20) generates a fetch address that depends upon a condition precedent and a received branch instruction. After executing each branch instruction, the branch unit predicts ...


4