1
Rathburn James: Compliant printed circuit peripheral lead semiconductor package. HSIO TECHNOLOGIES, Schwappach Karl G, December 9, 2010: WO/2010/141266 (45 worldwide citation)

A compliant printed circuit semiconductor package including a compliant printed circuit with at least a first dielectric layer selectively printed on a substrate with first recesses. A conductive material is printed in the first recesses to form contact members accessible along a first surface of th ...


2
Rathburn James: Compliant printed circuit semiconductor package. HSIO TECHNOLOGIES, Schwappach Karl G, December 9, 2010: WO/2010/141296 (44 worldwide citation)

A package for at least one semiconductor device and a method for making the package. At least one dielectric layer is selectively printed on at least a portion of the semiconductor device creating first recesses aligned with a plurality of the electrical terminals. A conductive material is printed i ...


3
James Rathburn: Compliant printed circuit semiconductor package. HSIO Technologies, Stoel Rives, December 31, 2013: US08618649 (43 worldwide citation)

A package for at least one semiconductor device and a method for making the package. At least one dielectric layer is selectively printed on at least a portion of the semiconductor device creating first recesses aligned with a plurality of the electrical terminals. A conductive material is printed i ...


4
James Rathburn: Method of making a compliant printed circuit peripheral lead semiconductor package. Hsio Technologies, Stoel Rives, February 17, 2015: US08955216 (27 worldwide citation)

A compliant printed circuit semiconductor package including a compliant printed circuit with at least a first dielectric layer selectively printed on a substrate with first recesses. A conductive material is printed in the first recesses to form contact members accessible along a first surface of th ...


5
James Rathburn: Compliant printed circuit semiconductor package. HSIO TECHNOLOGIES, Stoel Rives, July 7, 2015: US09076884 (2 worldwide citation)

A method of making a package for a semiconductor device having electrical terminals. At least one semiconductor device is located on a substrate. A first dielectric layer is printed on at least a portion of the semiconductor device to include first recesses aligned with a plurality of the electrical ...


6
James Rathburn: Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection. HSIO Technologies, April 4, 2017: US09613841 (1 worldwide citation)

An area array integrated circuit (IC) package for an IC device. The IC package includes a first substrate with conductive traces electrically coupled to the IC device. An interconnect assembly having a first surface is mechanically coupled to the first substrate. The interconnect assembly includes a ...


7
James Rathburn: Compliant printed circuit semiconductor package. Hsio Technologies, February 23, 2012: US20120043667-A1

A package for at least one semiconductor device and a method for making the package. At least one dielectric layer is selectively printed on at least a portion of the semiconductor device creating first recesses aligned with a plurality of the electrical terminals. A conductive material is printed i ...


8
James Rathburn: Compliant printed circuit peripheral lead semiconductor package. Hsio Technologies, February 23, 2012: US20120044659-A1

A compliant printed circuit semiconductor package including a compliant printed circuit with at least a first dielectric layer selectively printed on a substrate with first recesses. A conductive material is printed in the first recesses to form contact members accessible along a first surface of th ...


9
COMPLIANT PRINTED CIRCUIT SEMICONDUCTOR PACKAGE. HSIO TECHNOLOGIES, March 20, 2014: US20140080258-A1

A method of making a package for a semiconductor device having electrical terminals. At least one semiconductor device is located on a substrate. A first dielectric layer is printed on at least a portion of the semiconductor device to include first recesses aligned with a plurality of the electrical ...