1
James Rathburn: Compliant core peripheral lead semiconductor test socket. Hsio Technologies, Stoel Rives, December 17, 2013: US08610265 (43 worldwide citation)

An electrical interconnect for providing a temporary interconnect between terminals on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a substrate with a first surface having a plurality of openings arranged to correspond to the terminals on the I ...


2
James Rathburn: Direct metalization of electrical circuit structures. HSIO Technologies, March 21, 2017: US09603249

An electrical interconnect including a first circuitry layer with a first surface and a second surface. At least a first dielectric layer is printed on the first surface of the first circuitry layer to include a plurality of first recesses. A conductive material is plated on surfaces of a plurality ...


3
James Rathburn: Compliant core peripheral lead semiconductor test socket. Hsio Technologies, August 9, 2012: US20120199985-A1

An electrical interconnect for providing a temporary interconnect between terminals on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a substrate with a first surface having a plurality of openings arranged to correspond to the terminals on the I ...