1
David L Hill, Deborah T Marr, Dion Rodgers, Shiv Kaushik, James B Crossland, David A Koufaty: Coherency techniques for suspending execution of a thread until a specified memory access occurs. Intel Corporation, Blakely Sokoloff Taylor & Zafman, October 24, 2006: US07127561 (51 worldwide citation)

Coherency techniques for suspending execution of a thread until a specified memory access occurs. In one embodiment, a processor includes a cache, execution logic to execute an instruction having an operand indicating a monitor address and a bus controller. In one embodiment, the bus controller is t ...


2
David L Hill, Deborah T Marr, Dion Rodgers, Shiv Kaushik, James B Crossland, David A Koufaty: Coherency techniques for suspending execution of a thread until a specified memory access occurs. Jeffrey S Draeger, Blakely Sokoloff Taylor & Zafman, July 3, 2003: US20030126375-A1

Coherency techniques for suspending execution of a thread until a specified memory access occurs. In one embodiment, a processor includes a cache, execution logic to execute an instruction having an operand indicating a monitor address and a bus controller. In one embodiment, the bus controller is t ...