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Peter D MacWilliams, Clair C Webb, Robert L Farrell: Cache memory integrated circuit for use with a synchronous central processor bus and an asynchronous memory bus. Intel Corporation, July 13, 1993: US05228134 (84 worldwide citation)

An integrated circuit implements a cache static random access memory (SRAM) storage element which includes a central processor unit (CPU) bus interface incorporating multiplexers and buffers circuits for optimizing burst read and write operations across the CPU bus. Theses circuits allow a full cach ...


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