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Ayumu Yokoyama, Rajesh Gopalan Saliya, Eric C Houze, Violeta Ilieva Petkovska: Low foaming waterborne coating composition and use thereof. AZALTA COATING SYSTEMS IP CO, Lorenz & Kopf, March 7, 2017: US09587140

The present disclosure is directed to a waterborne coating composition having neutral pH that is low foaming and forms dry coating layer that has high hardness and high gloss. This disclosure is further directed to a coating composition comprising a crosslinking component comprising: (a) one or more ...


32
Mark D Maddox, Michael Coln, Gary R Carreau, Baozhen Chen: Calibration techniques for SAR ADCs with on-chip reservoir capacitors. ANALOG DEVICES, Patent Capital Group, May 2, 2017: US09641189

When reservoir capacitors are moved on-chip for individual bit decisions, a successive approximation register analog-to-digital converter (SAR ADC) has an addition source of error which can significantly affect the performance of the SAR ADC. Calibration techniques can be applied to measure and corr ...


33
Alexander A Alexeyev, Eric G Nestler: Sampled analog loop filter for phase locked loops. ANALOG DEVICES, Patent Capital Group, January 3, 2017: US09537492

An integrated circuit implements at least part of a phase locked loop (PLL). The integrated circuit includes a sampled analog loop filter for the PLL. The loop filter includes a first input for receiving a signal representative of a phase difference between a reference clock signal and a first clock ...


34
Wenhua W Yang: Reducing switching error in data converters. Analog Devices, Patent Capital Group, January 10, 2017: US09543974

In some converter architectures, unary digital-to-analog (DAC) converter elements generate an analog output which represents the digital input signal. Thermometer codes trigger an appropriate number of DAC elements to generate the analog output. The DAC elements are not all perfectly weighted, and m ...


35
Mohan Perumal Karthik, Sivaramakrishnan Subramanaiam, Praveen Krishna: Method and apparatus for synchronization of slave clock to master clock. ANALOG DEVICES GLOBAL, Patent Capital Group, February 28, 2017: US09584302

Existing synchronization methods can be inefficient in hardware-assisted implementations because of the effects of various jittery events. Thus, a method and an apparatus are provided to synchronize a slave device's clock to a master device's clock for a hardware-assisted implementation. The method ...


36
Ali Eshraghi, Alfredo Tomasini: Modular approach for reducing flicker noise of MOSFETs. ANALOG DEVICES, Patent Capital Group, January 31, 2017: US09559203

In one example implementation, the present disclosure provides a modular approach to reducing flicker noise in metal-oxide semiconductor field-effect transistors (MOSFETs) in a device. First, a circuit designer may select one or more surface channel MOSFETs in a device. Then, the one or more surface ...


37
Leszek Markowski, John Franetovich, Nico Corbo: Multi-piece rack shelf. Middle Atlantic Products, Drinker Biddle & Reath, May 9, 2017: US09648771

A multi-piece shelf for an electronics rack, the electronics rack having a base and at least two vertical posts. The multi-piece shelf includes at least two side brackets and a removable shelf, the side brackets being separate components from the shelf. Each side bracket includes a vertical wall and ...


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Gabriele Manganaro, Gil Engel: Randomized quad switching. ANALOG DEVICES, Patent Capital Group, February 28, 2017: US09584151

Reducing distortions in a digital-to-analog converter is a challenge for circuit designers. For current steering digital-to-analog converters (DACs), a quad switching scheme has been used to remove code-dependent glitching which is otherwise present in dual switching schemes. However, due to various ...


40
Eric C Jones, Andrew J Allan: MBIST device for use with ECC-protected memories. ANALOG DEVICES, Patent Capital Group, February 28, 2017: US09583216

A system implementing an MBIST device is disclosed. The system includes an ECC-protected memory and the MBIST device for self-test of the memory. The MBIST device includes a first access port communicatively connected to the memory via a first path, the first path excluding the ECC logic associated ...



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