1
Pradeep S Sindhu, Bjorn Liencres, Jorge Cruz Rios, Douglas B Lee, Jung Herng Chang, Jean Marc Frailong: Apparatus and method for a synchronous, high speed, packet-switched bus. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, March 16, 1993: US05195089 (54 worldwide citation)

A high speed, synchronous, packet-switched inter-chip bus apparatus and method for transferring data between multiple system buses and a cache controller. In the preferred embodiment, the bus connects a cache controller client within the external cache of a processor to a plurality of bus watcher cl ...


2
Sindhu Pradeep S, Liencres Bjorn, Cruz Rios Jorge, Lee Douglas B, Chang Jung Herng, Frailong Jean Marc: Apparatus and method for a synchronous, high speed, packet-switched bus.. Sun Microsystems, Xerox, August 5, 1992: EP0497054-A2 (11 worldwide citation)

A high speed, synchronous, packet-switched inter-chip bus apparatus and method for transferring data between multiple system buses and a cache controller. In the preferred embodiment, the bus connects a cache controller client within the external cache of a processor to a plurality of bus watcher cl ...


3
Sindhu Pradeep S, Liencres Bjorn, Cruz Rios Jorge, Lee Douglas B, Chang Jung Herng, Frailong Jean Marc: Dispositif et methode de transmission de donnees pour but rapide synchrome a commutation de paquets, Apparatus and method for a synchronous, high speed, packet-switched bus. Xerox Corporation, Sun Microsystems, Xerox Corporation, Sun Microsystems, RICHES MCKENZIE & HERBERT, May 29, 2001: CA2058581

A high speed, synchronous, packet-switched inter-chip bus apparatusand method for transferring data between multiple system buses and a cachecontroller. In the preferred embodiment, the bus connects a cache controllerclient within the external cache of a processor to a plurality of bus watcherclient ...