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Belgacem Haba Belgacem (Bel) Haba
David Light, Belgacem Haba, Thomas H Distefano, Konstantine Karavakis: Manufacture of semiconductor connection components with frangible lead sections. Tessera, Lerner David Littenberg Krumholz & Mentlik, August 14, 2001: US06274822 (6 worldwide citation)

A semiconductor chip connection component having numerous leads extending side-by-side across a gap in a support structure, each lead having a frangible section to permit detachment of one end of the lead from the support structure in a bonding process. The frangible sections are formed by treating ...


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Jerrold L King, Walter L Moden, Chender Huang: Method for producing high speed integrated circuits. Micron Technology, Wayne E Duffy, June 1, 1993: US05214845 (293 worldwide citation)

This invention creates a high speed semiconductor interconnect system which contains a plurality of signal traces, each in a flexible printed circuit, and each adhesively sandwiched between or adjacent to a flexible ground circuit and a flexible power circuit. The signal, power and ground circuits a ...


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David Jon Hiner, Ronald Patrick Huemoeller, Sukianto Rusli: Method of manufacturing a semiconductor package. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, March 6, 2007: US07185426 (258 worldwide citation)

A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die is mounted on an electrically conn ...


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Glenn J Leedy: Making and testing an integrated circuit using high density probe points. Skjerven Morrill MacPherson Franklin & Friel, April 14, 1992: US05103557 (237 worldwide citation)

Each transistor or logic unit on an integrated circuit wafer is tested prior to interconnect metallization. By means of CAD software, the transistor or logic units placement net list is revised to substitute redundant defect-free logic units for defective ones. Then the interconnect metallization is ...


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John A Centa, Laszlo Halasz: Method of making a flexible printed circuit sensor assembly for detecting optical pulses. Gould, Michael A Centanni, Cornelius F O Brien, November 23, 1993: US05263244 (191 worldwide citation)

A flexible sensor assembly for detecting optical pulses in which said sensor assembly comprises a flexible printed circuit having mounted thereon at least one light emitting diode and at least one photoelectric detector connected to different circuit patterns with an insulative tape secured over the ...


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Guillermo L Romero, Joe L Martinez Jr: Method for coupling a power lead to a bond pad in an electronic module. Motorola, Rennie WIlliam Dover, August 13, 1996: US05544412 (185 worldwide citation)

An electronic module and a method for coupling a power lead (32) to a bond pad (28) on a semiconductor die (17) within the electronic module. A clip support (13) having a slot (27) is coupled to a baseplate (11) via an isolation structure (14). The semiconductor die (17) is coupled to the baseplate ...


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Paul Reed: Method for making memory cards and similar devices using isotropic thermoset materials with high quality exterior surfaces. Cardxx, Frommer Lawrence & Haug, John R Lane, June 5, 2007: US07225537 (183 worldwide citation)

Memory Cards containing Integrated Circuits and other electronic components (e.g. resistors) in a variety of form factors having high quality external surfaces of polycarbonate, synthetic paper (e.g. Teslin), or other suitable material (e.g. PVC) can be made through use of injection molded thermopla ...


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Mark E Tuttle, Rickie C Lake, Curtis M Medlen: Method of manufacturing and testing an electronic device, and an electronic device. Micron Technology, Wells St John Roberts Gregory & Matkin P S, January 2, 2001: US06167614 (183 worldwide citation)

A method of manufacturing and testing an electronic circuit, the method comprising forming a plurality of conductive traces on a substrate and providing a gap in one of the conductive traces; attaching a circuit component to the substrate and coupling the circuit component to at least one of the con ...


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Hsin Shih Wang, Shang Jyh Shieh, Ming Hsin Ku: Method for programming a routing layout design through one via layer. Faraday Technology, Winston Hsu, October 30, 2007: US07287320 (179 worldwide citation)

A method for programming a routing layout design through one via layer includes forming a plurality of metal traces on a first routing layer and a second routing layer, and positioning a plurality of vias within a via layer disposed between the first and second routing layers for connecting the meta ...


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Emily Hawthorne: Method for mounting a microelectronic circuit peripherally-leaded package including integral support member with spacer. LSI Logic Corporation, Oppenheimer Poms Smith, October 7, 1997: US05673479 (175 worldwide citation)

A Tape-Automated-Bonding (TAB) package includes a resilient polyimide layer that supports a metal leadframe. A microelectronic circuit die is mounted in a hole in the polyimide layer and interconnected with inner leads of the leadframe. The TAB package is adhered to a support member having spacers t ...