21
Abbas Elgamal, Khaled A El Ayat, Amr Mohsen: User programmable integrated circuit interconnect architecture and test method. Actel Corporation, Lyon & Lyon, July 19, 1988: US04758745 (427 worldwide citation)

A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be prog ...


22
David W Caldwell: Touch sensor and control circuit therefor. Integrated Controls, Young & Basile P C, January 14, 1997: US05594222 (424 worldwide citation)

A low impedance touch sensor detects manual contact of a dielectric substrate by a human user. The touch sensor includes a first conductive electrode pad having a closed, continuous geometric form and a second conductive electrode which substantially co-planarly surrounds the first electrode and is ...


23
Randy T Ong: Programmable logic device which stores more than one configuration and means for switching configurations. Xilinx, Edel M Young, Greg T Sueoka, June 20, 1995: US05426378 (424 worldwide citation)

A programmable logic device includes a configuration memory expanded to store two or more complete sets of configuration data. A switch on the output of the configuration memory controls the selection of the configuration data applied to the configurable logic block. Each configurable logic block ha ...


24
William S Carter: Special interconnect for configurable logic array. Xilinx, Alan H MacPherson, Steven F Caserza, Richard Franklin, February 10, 1987: US04642487 (399 worldwide citation)

A special interconnect circuit which connects adjacent configurable logic elements (CLEs) in a configurable logic array (CLA) without using the general interconnect structure of the CLA. In one embodiment, an array of CLEs is arranged in rows and columns and a special vertical lead circuit is provid ...


25
Peter A Franaszek, Albert X Widmer: Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code. International Business Machines Corporation, Roy R Schlemmer, December 4, 1984: US04486739 (393 worldwide citation)

A binary DC balanced code and an encoder circuit for effecting same is described, which translates an 8 bit byte of information into 10 binary digits for transmission over electromagnetic or optical transmission lines subject to timing and low frequency constraints. The significance of this code is ...


26
Richard G Cliff, Bahram Ahanin, Craig S Lytle, Francis B Heile, Bruce B Pedersen, Kerry Veenstra: Programmable logic array having local and long distance conductors. Altera Corporation, Robert R Jackson, November 9, 1993: US05260611 (376 worldwide citation)

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module wit ...


27
Abbas A El Gamal, Khaled A El Ayat, Jonathan W Greene, Ta Pen R Guo, Justin M Reyneri: Programmable interconnect architecture. Actel Corporation, Lyon & Lyon, October 10, 1989: US04873459 (372 worldwide citation)

A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be prog ...


28
William H C Ebeling, Gaetano Borriello: Field programmable gate array. Washington Research Foundation, Christensen O Connor Johnson & Kindness, May 4, 1993: US05208491 (356 worldwide citation)

A field programmable gate array (FPGA) comprising routing and logic blocks (RLBs) and segmented routing channels is disclosed. Each RLB is configurable to perform both logic functions and routing functions. A plurality of forwardly propagating RLBs (FPRLBs) and a plurality of backwardly propagating ...


29
Bruce B Pedersen, Richard G Cliff, Bahram Ahanin, Craig S Lytle, Francis B Heile, Kerry S Veenstra: Programmable logic element interconnections for programmable logic array integrated circuits. Altera Corporation, Robert R Jackson, G Victor Treyz, November 9, 1993: US05260610 (348 worldwide citation)

A programmable logic array integrated circuit has a plurality of programmable logic elements grouped into a plurality of mutually exclusive groups. Each group includes signal conductors uniquely associated with that group for conveying signals between the programmable logic elements in that group. O ...


30
Stephen M Trimberger, Richard A Carberry, Robert Anders Johnson, Jennifer Wong: Time multiplexed programmable logic device. Xilinx, Jeanette S Harms, Norman R Klivans, July 8, 1997: US05646545 (341 worldwide citation)

A programmable logic device (PLD) comprises a plurality of configurable logic blocks (CLBs), an interconnect structure for interconnecting the CLBs, and a plurality of programmable logic elements for configuring the CLBs and the interconnect structure. Each CLB includes a combinational element and a ...