1
Moore Donald W: Functionally redundant logic network architectures with logic selection means.. Moore Donald W, Verstraete Rik A, March 12, 1986: EP0173744-A1 (771 worldwide citation)

A programmable gate structure (20) having functionally redundant architeture for enhanced production yields and reliability comprises a plurality of two-input nodes (10) at least some of which may be programmed by control states (24, 26 and 28) for changing the logical function of the gate structure ...


2
Randy T Ong: Programmable logic device which stores more than one configuration and means for switching configurations. Xilinx, Edel M Young, Greg T Sueoka, June 20, 1995: US05426378 (426 worldwide citation)

A programmable logic device includes a configuration memory expanded to store two or more complete sets of configuration data. A switch on the output of the configuration memory controls the selection of the configuration data applied to the configurable logic block. Each configurable logic block ha ...


3
Richard G Cliff, Bahram Ahanin, Craig S Lytle, Francis B Heile, Bruce B Pedersen, Kerry Veenstra: Programmable logic array having local and long distance conductors. Altera Corporation, Robert R Jackson, November 9, 1993: US05260611 (377 worldwide citation)

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module wit ...


4
Bruce B Pedersen, Richard G Cliff, Bahram Ahanin, Craig S Lytle, Francis B Heile, Kerry S Veenstra: Programmable logic element interconnections for programmable logic array integrated circuits. Altera Corporation, Robert R Jackson, G Victor Treyz, November 9, 1993: US05260610 (349 worldwide citation)

A programmable logic array integrated circuit has a plurality of programmable logic elements grouped into a plurality of mutually exclusive groups. Each group includes signal conductors uniquely associated with that group for conveying signals between the programmable logic elements in that group. O ...


5
Rafael C Camarota, Frederick C Furtek, Walford W Ho, Edward H Browder: Programmable logic cell and array. Concurrent Logic, Pennie & Edmonds, September 1, 1992: US05144166 (334 worldwide citation)

A programmable logic array comprising cells and a bus network in which the cells are arranged in a two-dimensional matrix of rows and columns and are interconnected by the bus network. The cells are also interconnected by a two-dimensional array of direct connections between a cell and its four near ...


6
Steven P Young, Kamal Chaudhary, Trevor J Bauer: FPGA repeatable interconnect structure with hierarchical interconnect lines. XILINX, Lois D Cartier, Edel M Young, June 22, 1999: US05914616 (330 worldwide citation)

The invention provides an FPGA interconnect structure preferably included in an array of identical tiles. A combination of single-length lines connecting to adjacent tiles and intermediate-length lines connecting to tiles several tiles away creates an interconnect hierarchy which allows any logic bl ...


7
Walford W Ho, Chao Chiang Chen, Yuk Y Yang: Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array. Intelligent Logic Systems, Phong K Fenwick & West Truong, October 3, 1995: US05455525 (329 worldwide citation)

A structured logic array is divided into hierarchical levels. At a highest level (the chip level), blocks are interconnected by a system of chip busses. A block interface couples each block to the chip bus system to allow the blocks to communicate with each other. At a lower level, each block includ ...


8
Sau Ching Wong, Hock Chuen So, Stanley J Kopec Jr, Robert F Hartmann: Programmable logic device with array blocks connected via programmable interconnect. Altera Corporation, Robert R Jackson, October 3, 1989: US04871930 (308 worldwide citation)

A programmable logic device having a relatively small number of programmable product terms ("P-terms") feeding each fixed combinatorial logic device, and additional "expander" programmable P-terms which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitab ...


9
Zvi Or Bach, Ze&apos ev Wurman, Richard Zeman, Laurance Cooke: Customizable and programmable cell array. eASIC Corporation, Jeffrey W Gluck, Venable, November 4, 2003: US06642744 (307 worldwide citation)

This invention discloses a customizable logic array including an array of programmable cells having a multiplicity of inputs and a multiplicity of outputs; and customized interconnections providing permanent direct interconnections among at least a plurality of the multiplicity of inputs and at leas ...


10
Thomas A Kean: Hierarchically connectable configurable cellular array. Xilinx, Edel M Young, November 21, 1995: US05469003 (306 worldwide citation)

An field programmable gate array (FPGA) of cells arranged in rows and columns is interconnected by a hierarchical routing structure. Switches separate the cells into blocks and into blocks of blocks with routing lines interconnecting the switches to form the hierarchy. Also, select units for allowin ...