1
David Sherrer
James W Getz, David W Sherrer, John J Fisher: Electronic device packages and methods of formation. Samsung Electronics, Sughrue Mion PLLC, June 19, 2012: US08203207 (41 worldwide citation)

Provided are electronic device packages and their methods of formation. The electronic device packages include an electronic device mounted on a substrate, a conductive via and a locally thinned region in the substrate. The invention finds application, for example, in the electronics industry for he ...


2
Belgacem Haba Belgacem (Bel) Haba
Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Piyush Savalia, Craig Mitchell: Void-free wafer bonding using channels. Tessera Research, June 21, 2012: US20120153426-A1

A method of bonding first and second microelectronic elements includes pressing together a first substrate containing active circuit elements therein with a second substrate, with a flowable dielectric material between confronting surfaces of the respective substrates, each of the first and second s ...


3
Eugene Fitzgerald
Matthew Currie, Anthony Lochtefeld, Richard Hammond, Eugene Fitzgerald: Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same. AmberWave Systems Corporation, Testa Hurwitz & Thibeault, December 14, 2004: US06831292 (261 worldwide citation)

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are pre ...


4
Eugene Fitzgerald
Eugene A Fitzgerald: Buried channel strained silicon FET using a supply layer created through ion implantation. AmberWave Systems Corporation, Testa Hurwitz & Thibeault, April 29, 2003: US06555839 (133 worldwide citation)

A circuit including at least one strained channel, enhancement mode FET, and at least one strained channel, depletion mode FET. The depletion mode FET includes an ion implanted dopant supply. In exemplary embodiments, the FETs are surface channel or buried channel MOSFETS. In another exemplary embod ...


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Eugene Fitzgerald
Kenneth C Wu, Eugene A Fitzgerald, Gianni Taraschi, Jeffrey T Borenstein: Etch stop layer system. Massachusetts Institute of Technology, The Charles Stark Draper Laboratory, Goodwin Procter, June 5, 2007: US07227176 (15 worldwide citation)

A semiconductor structure including a uniform etch-stop layer. The uniform etch stop layer has a relative etch rate which is less than approximately the relative etch rate of Si doped with 7×1019 boron atoms/cm3. A method for forming a semiconductor structure includes forming a uniform etch-stop lay ...


7
Eugene Fitzgerald
Michael J Mori, Eugene A Fitzgerald: Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission. Massachusetts Institute of Technology, Wolf Greenfield & Sacks P C, November 22, 2011: US08063397 (8 worldwide citation)

Semiconductor light-emitting structures are shown on engineered substrates having a graded composition. The composition of the substrate may be graded to achieve a lattice constant on which a yellow-green light-emitting semiconductor material may be disposed. In some embodiments, the structure may b ...


8
Eugene Fitzgerald
Matthew T Currie, Anthony J Lochtefeld, Eugene A Fitzgerald: Dual-channel CMOS transistors with differentially strained channels. AmberWave Systems Corporation, Goodwin Procter, November 21, 2006: US07138649 (7 worldwide citation)

A semiconductor structure having a substrate with a surface layer including strained silicon. The surface layer has a first region with a first thickness less than a second thickness of a second region. A gate dielectric layer is disposed over a portion of at least the first surface layer region.


9
Eugene Fitzgerald
Matthew Currie, Anthony Lochtefeld, Richard Hammond, Eugene Fitzgerald: Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, February 8, 2011: US07884353 (5 worldwide citation)

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are pre ...


10
Eugene Fitzgerald
Matthew Currie, Anthony Lochtefeld, Richard Hammond, Eugene Fitzgerald: Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same. AmberWave Systems Corporation, Testa Hurwitz & Thibeault, March 27, 2003: US20030057416-A1 (3 worldwide citation)

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are pre ...