1
Abatchev Mirzafer K, Sandhu Gurtej, Tran Luan, Rericha William T, Durcan Mark D: Method for integrated circuit fabrication using pitch multiplication. Micron Technology, Abatchev Mirzafer K, Sandhu Gurtej, Tran Luan, Rericha William T, Durcan Mark D, HART Daniel, March 9, 2006: WO/2006/026699 (144 worldwide citation)

A mixed pattern, combining two separately formed patterns (177, 230), is formed on a single mask layer (160) and then transferred to the underlying substrate (110). The first of the separately formed patterns, (177), is formed by pitch multiplication and the second of the separately formed patterns, ...


2
Mazur Martin, Hartig Carsten, Sulzer Georg: Method of defining the dimensions of circuit elements by using spacer deposition techniques. Advanced Micro Devices, sDRAKE Paul S, January 8, 2004: WO/2004/003977 (128 worldwide citation)

By using conventional spacer and etch techniques, microstructure elements, such as lines and contact openings of integrated circuits, may be formed with dimensions that are mainly determined by the layer thickness of the spacer layer. In a sacrificial layer (309), an opening is formed by means of st ...


3
Joerg Dreybrodt, Dirk Drescher, Ralf Zedlitz, Stephan Wege: Method of structuring layers with a polysilicon layer and an overlying metal or metal silicide layer using a three step etching process with fluorine, chlorine, bromine containing gases. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Ralph E Locher, November 12, 2002: US06479373 (122 worldwide citation)

Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping prof ...


4
Kamigaki Tetsuya, Ito Eiji, Hashimoto Koji, Kinoshita Hideyuki: Method of manufacturing semiconductor device. Toshiba, November 2, 2006: JP2006-303022 (106 worldwide citation)

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which can precisely and effectively form a pattern.SOLUTION: The method of manufacturing a semiconductor device includes a step to form first master patterns (21a and 21b) on base areas (13, 15 and 16), a step to form ...


5
Liu Wei, Lill Thorsten B, Mui David S L, Bencher Christopher Dennis: Method for fabricating a gate structure of a field effect transistor. Applied Materials, PATTERSON B Todd, December 31, 2003: WO/2004/001799 (101 worldwide citation)

A method for fabricating features on a substrate having reduced dimensions. The features are formed by defining a first mask (229) on regions of the substrate. The first mask is defined using lithographic techniques. A second mask (214) is then conformably formed on one or more sidewalls of the firs ...


6
Bersin Richard L: Dry plasma process for etching noble metal. International Plasma Corporation, Flehr Hohbach Test Albritton & Herbert, December 2, 1975: US3923568 (87 worldwide citation)

There is disclosed a process for etching noble metals, particularly for removing selected areas of thin films of electrically conductive noble metals, by contacting exposed areas of noble metal with a plasma that must include both fluorine and chlorine and may, optionally, also contain oxygen.


7
Poghossian Arshak, Schöning Michael J: (De) Verfahren zur selbstjustierenden verkleinerung von strukturen, (En) Method for the self-adjusted reduction in size of structures. Forschungszentrum Jülich, Poghossian Arshak, Schöning Michael J, FORSCHUNGSZENTRUM JÜLICH, February 3, 2005: WO/2005/010973 (85 worldwide citation)

(EN) The invention relates to a method for the self-adjusted reduction in size of structures in a layer sequence, whereby at least one metal layer is applied on a substrate, the structure to be reduced in size being limited by the at least one metal layer. Said method is characterized in that the me ...


8
Anchuan Wang, Xinglong Chen, Zihui Li, Hiroshi Hamana, Zhijun Chen, Ching Mei Hsu, Jiayin Huang, Nitin K Ingle, Dmitry Lubomirsky, Shankar Venkataraman, Randhir Thakur: Processing systems and methods for halide scavenging. Applied Materials, Kilpatrick Townsend & Stockton, July 28, 2015: US09093371 (80 worldwide citation)

Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional proc ...


9
Jingchun Zhang, Anchuan Wang, Nitin Ingle: Methods for etch of metal and metal-oxide films. Applied Materials, Kilpatrick Townsend & Stockton, June 23, 2015: US09064815 (80 worldwide citation)

A method of selectively etching a metal-containing film from a substrate comprising a metal-containing layer and a silicon oxide layer includes flowing a fluorine-containing gas into a plasma generation region of a substrate processing chamber, and applying energy to the fluorine-containing gas to g ...


10
Xikun Wang, Anchuan Wang, Nitin K Ingle, Dmitry Lubomirsky: Selective titanium nitride removal. Applied Materials, Kilpatrick Townsend & Stockton, May 26, 2015: US09040422 (80 worldwide citation)

Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal oxides lacking in titanium and/or silicon-containing films (e.g. silicon oxide, silicon carbon nitride and low-K dielectric films). The met ...