1
Scott H Holmberg, Richard A Flasck: Programmable cell for use in programmable electronic arrays. Energy Conversion Devices, Lawrence G Norris, February 12, 1985: US04499557 (387 worldwide citation)

An improved programmable cell for use in programmable electronic arrays such as PROM devices, logic arrays, gate arrays and die interconnect arrays. The cells have a highly non-conductive state settable and non-resettable into a highly conductive state. The cells have a resistance of 10,000 ohms or ...


2
Michael N Kozicki, William C West: Programmable metallization cell structure and method of making same. Axon Technologies Corporation, Arizona Board of Regents, Snell & Wilmer, June 2, 1998: US05761115 (358 worldwide citation)

A programmable metallization cell ("PMC") comprises a fast ion conductor such as a chalcogenide-metal ion and a plurality of electrodes (e.g., an anode and a cathode) disposed at the surface of the fast ion conductor and spaced a set distance apart from each other. Preferably, the fast ion conductor ...


3
John W Miller, Jossef Goldberg: Text completion system for a miniature computer. Microsoft Corporation, Jones & Askew, April 20, 1999: US05896321 (337 worldwide citation)

A text completion system that automatically displays a list of completion suggestions for a partial data entry in response to a pause in receipt of the data entry. To avoid annoying the user by displaying an excessive number of wrong suggestions, the text completion system applies search criteria to ...


4
Scott Holmberg, Richard A Flasck: Programmable cell for use in programmable electronic arrays. Energy Conversion Devices, Lawrence G Norris, Robert S Nolan, John T Winburn, July 8, 1986: US04599705 (332 worldwide citation)

A programmable cell for use in programmable electronic arrays such as PROM devices, logic arrays, gate arrays and die interconnect arrays. The cells have a highly non-conductive state settable and substantially non-resettable into a highly conductive state. The cells have a resistance of 10,000 ohms ...


5
Stanford R Ovshinsky, Stephen J Hudgens, David A Strand, Wolodymyr Czubatyj, Jesus Gonzalez Hernandez, Hellmut Fritzsche, Qiuyi Ye, Sergey A Kostylev, Benjamin S Chao: Homogeneous composition of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements. Marvin S Siskind, August 2, 1994: US05335219 (308 worldwide citation)

A unique class of microcrystalline semiconductor materials which can be modulated, within a crystalline phase, to assume any one of a large dynamic range of different Fermi level positions while maintaining a substantially constant band gap over the entire range, even after a modulating field has be ...


6
Steven E Wells: Method for wear leveling in a flash EEPROM memory. Intel Corporation, Blakely Sokoloff Taylor & Zafman, August 23, 1994: US05341339 (285 worldwide citation)

In a process for cleaning up a flash EEPROM memory array separated into blocks which may be separately erased, in which process all valid data is first written to other blocks of the array, and then the block is erased, the improvement including the step of determining a block to clean up based on a ...


7
Hideki Osaka, Masaya Umemura, Akira Yamagiwa, Toshitsugu Takekuma: Source-clock-synchronized memory system and memory unit. Hitachi, Antonelli Terry Stout & Kraus, March 7, 2000: US06034878 (270 worldwide citation)

A source-clock-synchronized memory system having a large data storage capacity per memory bank and a high mounting density. The invention includes a memory unit having a first memory riser board B1 mounted on a base board through a first connector C1 and a second memory riser board B2 mounted on the ...


8
William S Carter: Microprocessor oriented configurable logic element. Xilinx, Alan H MacPherson, Edel M Young, Terrence E Dooher, July 19, 1988: US04758985 (262 worldwide citation)

A microprocessor controlled configurable logic circuit achieves versatility by including a configurable combinational logic element, a configurable storage circuit, a configurable status buffer, and a configurable output select logic. The input signals to the configurable combinational logic element ...


9
Brent Keeth: Clock vernier adjustment. Micron Technology, Seed and Berry, January 18, 2000: US06016282 (257 worldwide citation)

A integrated circuit, such as a memory integrated circuit, includes a vernier clock adjustment circuit receiving an input clock signal and providing a rising-edge clock signal representing the input clock signal delayed by a rising-edge delay and providing a falling-edge clock signal representing th ...


10
Rosa Young, Napoleon Formigoni: Grooved optical data storage device including a chalcogenide memory layer. Energy Conversion Devices, Richard M Goldman, Marvin S Siskind, Judith M Riley, January 12, 1988: US04719594 (256 worldwide citation)

Disclosed is an optical data storage device having incorporated therein an optical data storage medium. The optical data storage device is switchable between at least two detectable states by the application of projected beam and energy thereto. The optical data storage device has a first substantia ...