1
Ulrich Klostermann
Rainer Leuschner, Ulrich Klostermann: Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, April 13, 2010: US07697322 (27 worldwide citation)

Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction i ...


2
Ulrich Klostermann
Stephen L Brown, Arunava Gupta, Ulrich Klostermann, Stuart Stephen Papworth Parkin, Wolfgang Raberg, Mahesh Samant: Magnetic tunnel junctions for MRAM devices. Infineon Technologies, International Business Machines Corporation, Slater & Matsil L, December 12, 2006: US07149105 (19 worldwide citation)

Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy ...


3
Ulrich Klostermann
Human Park, Ulrich Klostermann, Rainer Leuschner: Condensed memory cell structure using a FinFET. Qimonda, Altis Semiconductor SNC, John S Economou, March 4, 2014: US08665629 (10 worldwide citation)

An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell that includes a resistivity changing memory element. The resistivity changing memory element is electrically coupled to a select transistor that in ...


4
Ulrich Klostermann
Dietmar Gogl, Rainer Leuschner, Ulrich Klostermann: Integrated circuit, memory cell array, memory module, and method of operating an integrated circuit. Qimonda, ALTIS Semiconductor SNC, March 8, 2011: US07903454 (7 worldwide citation)

According to one embodiment of the present invention, an integrated circuit includes a plurality of thermal selectable memory cells, each memory cell being connected to a conductive line, the conductive line having a first portion for applying a heating current, and a second portion for applying a p ...


5
Ulrich Klostermann
Jacques Miltat, Yoshinobu Nakatani, Ulrich Klostermann: Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such memory cell. Infineon Technologies, Altis Semiconductor S N C, Centre National de la Recherche Scientifique, Universite Paris Sud, Edell Shapiro & Finnan, December 8, 2009: US07630231 (7 worldwide citation)

A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the fir ...


6
Ulrich Klostermann
Rok Dittrich, Ulrich Klostermann: Integrated circuit, cell arrangement, method of operating an integrated circuit, memory module. Qimonda, Altis Semiconductor SNC, May 12, 2009: US07532506 (5 worldwide citation)

An integrated circuit having a cell arrangement is provided. The cell arrangement includes at least one magnetoresistive memory cell, a first line providing a first line current, and a second line providing a second line current. The cell arrangement further includes a controller controlling the app ...


7
Ulrich Klostermann
Ulrich Klostermann: Integrated circuits; methods for operating an integrating circuit; memory modules. Qimonda, Altis Semiconductor SNC, Slater & Matsil L, October 13, 2009: US07602637 (3 worldwide citation)

Embodiments of the invention relate generally to integrated circuits, to methods for operating an integrating circuit, and to memory modules. In an embodiment of the invention, an integrated circuit having a magnetic random access memory cell is provided. The magnetic random access memory cell may i ...


8
Ulrich Klostermann
Hubert Brueckl, Ulrich Klostermann, Joachim Wecker: Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device. Infineon Technologies, Slater & Matsil L, July 11, 2006: US07075814 (1 worldwide citation)

A method and apparatus for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory cell device comprising an AAF layer system and an antiferromagnetic layer that exchange-couples a layer of the AAF layer system, characterized in that, given a defined direction of magn ...


9
Ulrich Klostermann
Peter Schrogmeier, Ulrich Klostermann: Method and integrated circuit for determining the state of a resistivity changing memory cell. Qimonda, Dicke Billig & Czaja PLLC, July 6, 2010: US07751231

A method and an integrated circuit for determining the state of a resistivity changing memory cell. In one embodiment the method includes detecting a first resistance of the resistivity changing memory cell, determining whether the first resistance value is smaller than a predetermined threshold val ...


10
Ulrich Klostermann
Wolfgang Raberg, Ulrich Klostermann: Memory cell using spin induced switching effects. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, May 11, 2010: US07715225

According to an embodiment, an integrated circuit includes a magneto-resistive memory cell. The magneto-resistive memory cell includes: a first ferromagnetic layer; a second ferromagnetic layer; and a nonmagnetic layer being disposed between the first ferromagnetic layer and the second ferromagnetic ...