1
Bahman Qawami
Chang Robert C, Qawami Bahman, Sabet Sharghi Farshid: Unusable block management within a non-volatile memory system. Sandisk, May 12, 2004: EP1418502-A2 (49 worldwide citation)

Methods and apparatus for tracking defective blocks such that at least some of the defective blocks may be readily identified and tested for usability when desirable are disclosed. According to one aspect of the present invention, a method for identifying spare blocks within a non-volatile memory in ...


2
Bahman Qawami
Chang Robert C, Qawami Bahman, Sabet Sharghi Farshid: Management for unworkable block in nonvolatile memory system. Sandisk, May 27, 2004: JP2004-152299 (2 worldwide citation)

PROBLEM TO BE SOLVED: To use a block identified as a defective block but usable potentially as a spare block.SOLUTION: This invention includes a process for subjecting at least one physical block identified as a defective one inside a nonvolatile memory 124 to an inspection, in which it is determine ...


3
Bahman Qawami
Alan Chiou, Bahman Qawami, Farshid Sabet sharghi: Method of testing memory card operation. SanDisk Corporation, Vierra Magen Marcus & DeNiro, March 23, 2010: US07685478 (1 worldwide citation)

A system and method are disclosed for testing operation of a memory card within an electronic host device. The system includes a flat flexible cable, or strip, for electrically coupling between the memory card slot in a host device and a test assembly. The test assembly may have a card slot for acce ...


4
Bahman Qawami
Alan Chiou, Bahman Qawami, Farshid Sabet sharghi: Extender strip and test assembly for testing memory card operation. SanDisk Corporation, Vierra Magen Marcus & DeNiro, March 9, 2010: US07676714 (1 worldwide citation)

A system and method are disclosed for testing operation of a memory card within an electronic host device. The system includes a flat flexible cable, or strip, for electrically coupling between the memory card slot in a host device and a test assembly. The test assembly may have a card slot for acce ...


5
Marc Lanoiselee
Bauduin Jean Pierre, Lanoiselee Marc: Electronic component e.g. field programmable gate array, programming and testing system, has switches to isolate bus of daughterboard from daughterboard and motherboard connection units when component control device is connected to bus. France Telecom, June 16, 2006: FR2879297-A1

The system has a daughterboard (100) with a communication bus (B2) permitting access to electronic components. Connection units (CN3) connect the daughterboard to a motherboard (150) with communication buses. Other connection units connect the daughterboard to an electronic component control device. ...


6
Ganesh Sundaram
Thomas Eric Ryle, Ganesh Sundaram, Hitesh Amin, Vikram Devdas, John Diab, Fuchun Jiang, Charles Allen Carriker Jr, Marc Alan Bennett: Method and system for emulating a Fiber Channel link over a SONET/SDH path. Cisco Technology, Aka Chan, March 28, 2006: US07020814 (17 worldwide citation)

A method and system for emulating an Fibre Channel link over a SONET transport path by which Fibre Channel data is transported across the SONET/SDH transport path. To provide link integrity, techniques to handle link failures from a Fibre Channel element to its associated Fibre Channel port, or of t ...


7
sally liu
Yih Yuh Doong, Keh Jeng Chang, Yuh Jier Mii, Sally Liu, Lien Jung Hung, Victor Chih Yuan Chang: Accurate capacitance measurement for ultra large scale integrated circuits. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, February 14, 2012: US08115500 (3 worldwide citation)

Test structures and methods for measuring contact and via parasitic capacitance in an integrated circuit are provided. The accuracy of contact and via capacitance measurements are improved by eliminating not-to-be-measured capacitance from the measurement results. The capacitance is measured on a ta ...


8
Ishikawa Shinji: Semiconductor memory and its test method. Sharp, March 20, 2003: JP2003-086000 (2666 worldwide citation)

PROBLEM TO BE SOLVED: To provide a semiconductor memory which can easily and accurately discriminate a contact state of an external terminal by same simple timing as that in normal operation without adding an exclusive terminal for test after mounting a semiconductor chip on a board.SOLUTION: This m ...


9
Rajen Chanchani: Heterogeneously integrated microsystem-on-a-chip. Sandia Corporation, Kevin W Bieg, February 26, 2008: US07335972 (272 worldwide citation)

A microsystem-on-a-chip comprises a bottom wafer of normal thickness and a series of thinned wafers can be stacked on the bottom wafer, glued and electrically interconnected. The interconnection layer comprises a compliant dielectric material, an interconnect structure, and can include embedded pass ...


10
Hagge John K, Johnson Frederick W: Microelectric heat exchanger pedestal. Collins Radio Company, January 9, 1973: US3710251 (224 worldwide citation)

A microelectric wafer or chip vacuum chuck in the form of a heat exchanger pedestal with a heat exchanger pressure vessel at the pedestal top through which hot and cold fluids are selectively pumped in circulation from and return to, respectively, hot and cold remote fluid reservoirs. A plurality of ...