1
Deodatta Shenai-Khatkhate
Shenai Khatkhate Deodatta, Woelk Egbert: Organometallic compounds suitable for use in vapor deposition processes. Rohm &Amp, Haas Elect Materials, April 12, 2006: EP1645656-A1 (6 worldwide citation)

A method of depositing a film comprising a Group IIIA metal on a substrate comprising the steps of: a) conveying a Group IIIA metal compound having the formula R 3 M, where M is a Group IIIA metal and each R is independently a (C 1 -C 10 ) organic radical or hydrogen, in a gaseous phase to a deposit ...


2
Deodatta Shenai-Khatkhate
Deodatta Vinayak Shenai Khatkhate, Egbert Woelk: Organometallic compounds. Rohm and Haas Electronic Materials, S Matthew Cairns, June 24, 2008: US07390360 (4 worldwide citation)

Compositions useful in the manufacture of compound semiconductors are provided. Methods of manufacturing compound semiconductors using these compositions are also provided.


3
Katherina Babich
Katherina E Babich, Scott D Halle, David V Horak, Arpan P Mahorowala, Wesley C Natzle, Dirk Pfeiffer, Hongwen Yan: Etch selectivity enhancement for tunable etch resistant anti-reflective layer. International Business Machines Corporation, Yuanmin Cai Esq, Hoffman Warnick & D Alessandro, July 18, 2006: US07077903 (4 worldwide citation)

Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA laye ...


4
Hani Badawi
Weiguo Liu, Morris S Young, M Hani Badawi: Low Etch Pit Density (EPD) Semi-Insulating III-V Wafers. AXT, December 1, 2011: US20110293890-A1

Systems and methods of manufacturing wafers are disclosed using a low EPD crystal growth process and a wafer annealing process are provided resulting in III-V/GaAs wafers that provide higher device yields from the wafer. In one exemplary implementation, there is provided a method of manufacturing a ...


5
Hani Badawi
Weiguo Liu, Morris S Young, M Hani Badawi: Low etch pit density (EPD) semi-insulating GaAs wafers. Dla Piper Us, November 13, 2008: US20080280427-A1

A method for manufacturing wafers using a low EPD crystal growth process and a wafer annealing process is provided that results in GaAs/InGaP wafers that provide higher device yields from the wafer.


6
David Sherrer
David W Sherrer, Noel A Heiks: Optoelectronic component. Rohm And Haas Electronic Materials, Jonathan D Baskin, Edwards & Angell, September 22, 2005: US20050205771-A1

Provided are optoelectronic components which contain an optoelectronic device and an encapsulant.


7
Katherina Babich
Katherina E Babich, Scott D Halle, David V Horak, Arpan P Mahorowala, Wesley C Natzle, Dirk Pfeiffer, Hongwen Yan: Etch selectivity enhancement for tunable etch resistant anti-reflective layer. International Business Machines Corporation, Hoffman Warnick & D Alessandro, May 12, 2005: US20050098091-A1

Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA laye ...


8
Nathaniel Brese
Nathaniel E Brese, Jitendra S Goela, Michael A Pickering: Silicon carbide with high thermal conductivity. Rohm and Haas Electronic Materials, Edwards & Angell, January 6, 2005: US20050000412-A1

A chemical vapor deposited, β phase polycrystalline silicon carbide having a high thermal conductivity and reduced stacking faults. The silicon carbide is synthesized under specific conditions using hydrogen gas and methyltrichlorosilane gas as reactants. The thermal conductivity of the silicon carb ...


9
Eugene Fitzgerald
Kenneth C Wu, Eugene A Fitzgerald, Jeffrey T Borenstein: Etch stop layer system. Massachusetts Institute of Technology, Testa Hurwitz & Thibeault, February 18, 2003: US06521041 (61 worldwide citation)

A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si


10
Eugene Fitzgerald
Eugene A Fitzgerald, Srikanth B Samavedam: Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon. Massachusetts Institute of Technology, Samuels Gauthier & Stevens, March 21, 2000: US06039803 (61 worldwide citation)

A method of processing semiconductor materials, including providing a monocrystalline silicon substrate having a (001) crystallographic surface orientation; off-cutting the substrate to an orientation from about 2.degree. to about 6.degree. offset towards the [110] direction; and epitaxially growing ...



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