1
Yunxiang Wu, Zhengang Chen, YingQuan Wu, Ning Chen: Method of optimizing solid state drive soft retry voltages. Seagate Technology, Suiter Swantz pc llo, May 5, 2015: US09025393 (26 worldwide citation)

A method of optimizing solid state drive (SSD) soft retry voltages comprises limiting a number of voltage reads and properly spacing and determining the reference voltage at which each voltage is read based on desired Bit Error Rate (BER) and channel throughput. The method determines each reference ...


2
Yunxiang Wu, Erich F Haratsch, Yu Cai, Abdel Hakim Alhussien: Flash memory read retry using histograms. LSI Corporation, Daniel J Santos, Smith Risley Tempel Santos, February 10, 2015: US08953373 (12 worldwide citation)

Upon a read error, a flash memory controller adjusts a candidate reference voltage on successive read retries until either a read error no longer occurs or an optimal reference voltage is attained. Optimal reference voltages correspond to cross-points of flash memory cell voltage distributions. Cros ...


3
Zhengang Chen, Yunxiang Wu: Mixed granularity higher-level redundancy for non-volatile memory. LSI Corporation, PatentVentures, Bennett Smith, Korvin Van Dyke, October 7, 2014: US08856431 (8 worldwide citation)

Mixed-granularity higher-level redundancy for NVM provides improved higher-level redundancy operation with better error recovery and/or reduced redundancy information overhead. For example, pages of the NVM that are less reliable, such as relatively more prone to errors, are operated in higher-level ...


4
Yunxiang Wu, Henry Bang, Richard Wang: Read channel averaging. Seagate Technology International, Cesari & Reed, David K Lucente, October 29, 2013: US08570679 (5 worldwide citation)

A hard disk drive with a read channel that averages data before the data is provided to a viterbi detector of the channel. Averaging the data reduces the zero mean noise in the data.


5
Yunxiang Wu, Yu Cai, Erich F Haratsch: Systems and methods for soft data utilization in a solid state memory system. Seagate Technology, Holland & Hart, December 1, 2015: US09201729 (4 worldwide citation)

Systems and methods relating generally to solid state memory, and more particularly to systems and methods for recovering data from a solid state memory.


6
Yunxiang Wu, Earl T Cohen: Soft-decision compensation for flash channel variation. LSI Corporation, PatentVentures Bennett Smith, Korbin Van Dyke, October 7, 2014: US08856611 (4 worldwide citation)

In an SSD controller reading from flash memory, subsequent to failure of an initial soft-decision decoding attempt based on a nominal LLR, soft-decision re-decoding attempts are made using compensated LLR soft-decision information sets, pre-calculated at respective read-equilibrium points correspond ...


7
Yu Cai, Yunxiang Wu, Erich F Haratsch, Ning Chen: Systems and methods for differential message scaling in a decoding process. Seagate Technology, Holland & Hart, June 28, 2016: US09378765 (3 worldwide citation)

Systems and method relating generally to data processing, and more particularly to systems and methods for scaling messages in a data decoding circuit. In one embodiment, the systems and methods include applying a variable node algorithm, applying a check node algorithm, calculating a first number o ...


8
AbdelHakim S Alhussien, Yunxiang Wu, Sundararajan Sankaranarayanan, Zhengang Chen, Erich F Haratsch: Multiple retry reads in a read channel of a memory. Seagate Technology, Christopher P Maiorana PC, January 12, 2016: US09236099 (3 worldwide citation)

An apparatus having a circuit and a decoder is disclosed. The circuit is configured to (i) adjust an initial one of a plurality of reference voltages in a read channel of a memory by shifting the initial reference voltage an amount toward a center of a window and (ii) read a codeword from the memory ...


9
Erich F Haratsch, Jeremy Werner, Zhengang Chen, Earl T Cohen, Yunxiang Wu, Ning Chen: Flash memory read error recovery with soft-decision decode. Seagate Technology, Christopher P Maiorana PC, April 28, 2015: US09021332 (3 worldwide citation)

An apparatus having a circuit and one or more processor is disclosed. The circuit is configured to receive a codeword from a memory. The memory is nonvolatile. The codeword generally has one or more errors. The processors are configured to generate read data by decoding the codeword repeatedly. The ...


10
Yunxiang Wu, Zhengang Chen, Yu Cai, Erich F Haratsch: Method of erase state handling in flash channel tracking. Seagate Technology, Christopher P Maiorana PC, December 15, 2015: US09213599 (2 worldwide citation)

An apparatus includes a non-volatile memory and a controller. The controller may be configured to track one or more channel parameters of the non-volatile memory. The controller may be further configured to estimate an erase state voltage distribution of the non-volatile memory by selecting one or m ...