1
Yun Hsiu Chen, Syun Ming Jang, Pang Yen Tsai: Method of manufacturing strained-silicon semiconductor device. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, August 28, 2012: US08255843 (79 worldwide citation)

A method for fabricating a strained-silicon semiconductor device to ameliorate undesirable variation in selectively grown epitaxial film thickness. The layout or component configuration for the proposed semiconductor device is evaluated to determine areas of relatively light or dense population in o ...


2
Yun Hsiu Chen, Syun Ming Jang: Method of making transistor with strained source/drain. Taiwan Semiconductor Manufacturing, Duane Morris, October 10, 2006: US07118952 (48 worldwide citation)

A method of fabricating a transistor comprises the steps of: forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing, forming recesses in the semiconductor substrate at respective locations where a source region and a drain region are to be fo ...


3
Ken Liao, Kuo Hua Pan, Yun Hsiu Chen, Syun Ming Jang, Yi Ching Lin: Method for forming a strained channel in a semiconductor device. Taiwan Semiconductor Manufacturing, Birch Stewart Kolasch & Birch, July 13, 2010: US07754571 (8 worldwide citation)

A method for forming a strained channel in a semiconductor device is provided, comprises providing of a transistor comprising a gate stack exposed with a gate electrode on a semiconductor substrate, a pair of source/drain regions in the substrate on opposite sides of the gate stack and a pair of spa ...


4
Wen Ping Yen, Yun Hsiu Chen, Hung Cheng Weng: MOS device with dual gate insulators and method of forming the same. Silicon Integrated Systems, Birch Stewart Kolasch & Birch, April 22, 2003: US06551883 (3 worldwide citation)

A MOS device with dual gate insulators has a first gate insulator formed on a predetermined area of a semiconductor substrate, and a second gate insulator formed outside the predetermined area of the semiconductor substrate to surround the first gate insulator. The second gate insulator is thicker t ...


5
Yun Hsiu Chen, Syun Ming Jang: Method of manufacturing strained-silicon semiconductor device. Taiwan Semiconductor Manufacturing Company, Slater & Matsil, May 17, 2007: US20070111404-A1

A method for fabricating a strained-silicon semiconductor device to ameliorate undesirable variation in epitaxial film thickness. The layout or component configuration for the proposed semiconductor device is evaluated to determine areas of relatively light or dense population in order to determine ...


6
Wen Ping Yen, Yun Hsiu Chen, Hung Cheng Weng: MOS device with dual gate insulators and method of forming the same. Silicon Integrated Systems, Birch Stewart Kolasch & Birch, August 7, 2003: US20030146478-A1

A MOS device with dual gate insulators has a first gate insulator formed on a predetermined area of a semiconductor substrate, and a second gate insulator formed outside the predetermined area of the semiconductor substrate to surround the first gate insulator. The second gate insulator is thicker t ...


7
Yun Hsiu Chen, Hsin Yi Chang, Yu Ling Huang: Method of etching a dielectric layer. Birch Stewart Kolasch & Birch, October 31, 2002: US20020160617-A1

A method of etching a dielectric layer employs steps of: providing a silicon substrate with a surface covered by the dielectric layer; polymer-rich plasma etching to remove part of the dielectric layer and form a polymer film on the exposed regions of the dielectric layer and the silicon substrate; ...


8
Hsin Yi Chang, Yun Hsiu Chen, Lung Hui Tsai: Method for inline monitoring of a devices pattern profile. Birch Stewart Kolasch & Birch, November 7, 2002: US20020164830-A1

A method for inline monitoring of a device's pattern profile is disclosed. An insulator is deposited on the patterned layer to be detected by high density plasma chemical vapor deposition. A defect measurement device or refraction measurement device is used to compare the difference of the insulator ...


9
Yun Hsiu Chen, Syun Ming Jang: Integrated circuit with strained and non-strained transistors, and method of forming thereof. Slater & Matsil, December 1, 2005: US20050266632-A1

Preferred embodiments of the present invention utilize system-level band gap engineering. Device improving structures, such as the strained source/drain regions for PMOS devices and a tensile film for NMOS devices, may be employed only in those selected regions such as where high drive current is ne ...


10
Ken Liao, Kuo Hua Pan, Yun Hsiu Chen, Syun Ming Jang, Yi Ching Lin: Method for forming a strained channel in a semiconductor device. Taiwan Semiconductor Manufacturing, Birch Stewart Kolasch & Birch, May 29, 2008: US20080124875-A1

A method for forming a strained channel in a semiconductor device is provided, comprises providing of a transistor comprising a gate stack exposed with a gate electrode on a semiconductor substrate, a pair of source/drain regions in the substrate on opposite sides of the gate stack and a pair of spa ...