1
Hiroshi Kobayashi, Hisashi Yamada, Yukimasa Uchida: Liquid crystal display device. Tokyo Shibaura Denki Kabushiki Kaisha, Oblon Fisher Spivak McClelland & Maier, February 21, 1984: US04432610 (75 worldwide citation)

A liquid crystal display device is proposed which has a substrate having electrodes corresponding to the display picture elements, liquid crystal arranged on the substrate through a dielectric mirror, and a transparent electrode arranged on liquid crystal and applying electric fields to the liquid c ...


2
Yukimasa Uchida: Internally regulated power voltage circuit for MIS semiconductor integrated circuit. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett & Dunner, April 29, 1986: US04585955 (71 worldwide citation)

A MIS semiconductor integrated circuit is one which contains an internal circuit. In the internal circuit, an externally supplied power source voltage supplied to a power source voltage terminal is supplied to the voltage input terminal of a voltage dropping circuit. The voltage at a voltage output ...


3
Yukimasa Uchida: Non-volatile semiconductor memory device. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett & Dunner, May 24, 1983: US04385308 (64 worldwide citation)

A silicon nitride layer and a memory gate electrode are successively formed over a portion of a principal surface of a semiconductor substrate between drain and source regions formed therein and adjacent to the drain region via a thin silicon dioxide layer. A portion of the substrate principal surfa ...


4
Yukimasa Uchida: Non-volatile random access memory system. Tokyo Shibaura Electric, Oblon Fisher Spivak McClelland & Maier, August 23, 1977: US04044343 (40 worldwide citation)

A non-volatile random access memory system includes a memory array circuit having a plurality of unit non-volatile memory cells arranged in a matrix array. Each unit memory cell includes a flip-flop circuit and two MNOS transistors into which a data in the flip-flop is written and from which the dat ...


5
Yukimasa Uchida: Semiconductor memory. Tokyo Shibaura Denki Kabushiki Kaisha, Schwartz Jeffery Schwaab Mack Blumenthal & Evans, August 26, 1986: US04608666 (39 worldwide citation)

A large capacity and high speed semiconductor memory is disclosed. Static memory cell rows are provided so as to correspond to dynamic memory cell rows in a dynamic memory cell array. Information is transferred with transfer means between static memory cells in the static memory cell rows and dynami ...


6
Yukimasa Uchida: Semiconductor memory device with buried layer under groove capacitor. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner, December 20, 1988: US04792834 (38 worldwide citation)

Disclosed is a semiconductor memory device which has a transfer transistor of a MOS structure on a surface of a semiconductor body, and a trenched capacitor having a groove which is formed so as to extend from a surface of the semiconductor body to a certain depth thereof and an electrode which is f ...


7
Yukimasa Uchida: Semiconductor integrated circuit including a fuse element. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett and Dunner, May 14, 1985: US04517583 (37 worldwide citation)

A semiconductor integrated circuit includes a transistor element, an insulating layer formed adjacent to the transistor, and a wiring connected to the transistor element at one end thereof and having a fuse as a part thereof. The wiring is made of monocrystalline silicon and formed on the insulating ...


8
Yukimasa Uchida: Programmable circuit including a latch to store a fuses state. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett & Dunner, July 30, 1985: US04532607 (36 worldwide citation)

A programmable circuit has a fuse element grounded at one end and melted or not melted according to the data to be programmed and a select circuit for selectively producing either of two signals according to "melted" or "not melted" states of the fuse element. The other end of the fuse element is co ...


9
Yukimasa Uchida: CMOS Sense amplifier. Tokyo Shibaura Denki Kabushiki Kaisha, Finnegan Henderson Farabow Garrett & Dunner, October 23, 1984: US04479202 (32 worldwide citation)

A memory circuit comprises a plurality of memory cells and a plurality of sense circuits each including first and second input MOS transistors and first and second load MOS transistors of a first channel type and a load circuit connected to the sense circuit and including first to fourth load MOS tr ...


10
Yukimasa Uchida: Semiconductor device with programmable fuse. Tokyo Shibaura Denki Kabushiki Kaisha, Cushman Darby & Cushman, March 21, 1989: US04814853 (32 worldwide citation)

A first wiring layer is formed on a substrate. An insulation layer is formed on the first wiring layer so as to cover with the first wiring layer. A second wiring layer, which acts as a fuse device, is formed on the insulation layer transverse to the first wiring layer. A programming current is dire ...