1
Hirotsugu Kojima, Atsushi Kiuchi, Yuichi Takitsune, Katsumi Yamamoto: Wireless communication system and microcomputer. Renesas Technology Corporation, Mattingly Stanger Malur & Brundidge P C, May 1, 2007: US07212786 (11 worldwide citation)

Providing a wireless communication device that, even if clock stop of a radio frequency part is controlled by a baseband part operating on the same clock signal, can resume clock oscillation, and makes it easy to time the clock reactivation to other operations based on a shared clock. The wireless c ...


2
Yasuyuki Murakami, Shigezumi Matsui, Kunihiko Nishiyama, Atsushi Kiuchi, Yuichi Takitsune: Data processer and data processing system. Hitachi, Hitachi ULSI Systems, Miles & Stockbridge P C, April 1, 2003: US06542982 (6 worldwide citation)

In order to simplify the instruction prefetch architecture for use with the programs having few loops, and having instructions almost in linear and sequential addresses, the bus controller in accordance with the present invention for controlling the bus in an external memory includes a plurality of ...


3
Yasuyuki Murakami, Shigezumi Matsui, Kunihiko Nishiyama, Atsushi Kiuchi, Yuichi Takitsune: Cell phones with instruction pre-fetch buffers allocated to low bit address ranges and having validating flags. Hitachi, Hitachi ULSI Systems, Miles & Stockbridge P C, August 13, 2002: US06434691 (5 worldwide citation)

In order to simplify the instruction prefetch architecture for use with the programs having few loops, and having instructions almost in linear and sequential addresses, the bus controller in accordance with the present invention for controlling the bus in an external memory includes a plurality of ...


4
Shinichi Suzuki, Yuichi Takitsune: Microcomputer. Renesas Electronics Corporation, Shapiro Gabor and Rosenberger PLLC, March 27, 2018: US09928184

A microcomputer is provided for each of industrial apparatuses to synchronously control them and includes a CPU, a peripheral module, and a communication interface. The peripheral module controls an external apparatus based on a specified control parameter. The communication interface includes a tim ...


5
Yuichi Takitsune, Kazunori Masaki, Motoshige Ikeda: Semiconductor device, electronic device module and network system. RENESAS ELECTRONICS CORPORATION, McGinn I P Law Group PLLC, July 31, 2018: US10038827

A semiconductor device includes an adjusting circuit that transmits a control signal to a device to be controlled according to a transmission cycle synchronized with a reference clock. The device to be controlled has a first period during which the control signal is allowed to be supplied to the dev ...


6
Yasuyuki Murakami, Shigezumi Matsui, Kunihiko Nishiyama, Atsushi Kiuchi, Yuichi Takitsune: Data processor and data processing system. Mitchell W Shapiro, Miles & Stockbridge PC, August 30, 2001: US20010018735-A1

In order to simplify the instruction prefetch architecture for use with the programs having few loops, and having instructions almost in linear and sequential addresses, the bus controller in accordance with the present invention for controlling the bus in an external memory includes a plurality of ...


7
Hirotsugu Kojima, Atsushi Kiuchi, Yuichi Takitsune, Katsumi Yamamoto: Wireless communication system and microcomputer. Mattingly Stanger & Malur PC, October 14, 2004: US20040203389-A1

Providing a wireless communication device that, even if clock stop of a radio frequency part is controlled by a baseband part operating on the same clock signal, can resume clock oscillation, and makes it easy to time the clock reactivation to other operations based on a shared clock. The wireless c ...


8
Yasuyuki Murakami, Shigezumi Matsui, Kunihiko Nishiyama, Atsushi Kiuchi, Yuichi Takitsune: Data processer and data processing system. Vorys Sater Seymour Pease, August 29, 2002: US20020120829-A1

In order to simplify the instruction prefetch architecture for use with the programs having few loops, and having instructions almost in linear and sequential addresses, the bus controller in accordance with the present invention for controlling the bus in an external memory includes a plurality of ...