1
Yugo Tomioka, Shoichi Iwasa, Yasuo Sato, Toshio Wada, Kenji Anzai: Electrically alterable n-bit per cell non-volatile memory with reference cells. Nippon Steel Corporation, Pollock Vande Sande & Priddy, January 21, 1997: US05596527 (120 worldwide citation)

An electrically alterable non-volatile memory having a memory cell array including a plurality of memory cells, each memory cell including a transistor having a selected one of a plurality of different threshold voltages; a reference cell array including at least one set of reference cells, each ref ...


2
Yugo Tomioka, Shoichi Iwasa, Yasuo Sato, Toshio Wada, Kenji Anzai: Method of writing into non-volatile semiconductor memory. Nippon Steel Corporation, Pollock Vande Sande & Priddy, May 23, 1995: US05418743 (87 worldwide citation)

A method of using a non-volatile semiconductor memory comprising a plurality of row and column lines, a plurality of memory cells disposed at intersections of the row and column lines and a plurality of reference cells disposed on each of the row lines. Each memory cell includes an MOS transistor ha ...


3
Yugo Tomioka: Non-volatile semiconductor memory device with improved rewrite speed. Nippon Steel Corporation, Law Offices Pollock Vande Sande & Priddy, June 17, 1997: US05640032 (42 worldwide citation)

A non-volatile semiconductor memory device comprises a semiconductor substrate, a shield gate electrode formed over a device isolation region of the semiconductor substrate through a shield gate insulating film, a floating gate electrode formed over a device region of the semiconductor substrate thr ...


4
Yugo Tomioka, Yasuo Sato: Nonvolatile semiconductor storage device and method of manufacturing. Nippon Steel Corporation, Law Offices Pollock Vande Sande & Priddy, August 11, 1998: US05793081 (26 worldwide citation)

A nonvolatile semiconductor storage device in which a composite gate of a floating gate memory cell transistor and a gate electrode of a peripheral MOS transistor are formed in the same lithography process and a manufacturing method thereof. A polycrystalline silicon film and an ONO film are formed ...


5
Yugo Tomioka: Nonvolatile semiconductor memory device and a method of making the same. Nippon Steel Corporation, Pollock Vande Sande & Priddy, August 18, 1998: US05796140 (12 worldwide citation)

A nonvolatile semiconductor memory device including a plurality of memory cells, and a method of making this memory device. The nonvolatile semiconductor memory device includes: a semiconductor substrate; an element-isolation structure formed in a surface of the semiconductor substrate and having at ...


6
Yugo Tomioka: Semiconductor device having field-shield isolation structures and a method of making the same. Nippon Steel Corporation, Pollock Vande Sande & Priddy, June 24, 1997: US05641989 (12 worldwide citation)

A semiconductor device includes a semiconductor substrate of a first conductivity type, a plurality of spaced field-shield isolation structures formed on a surface of the substrate and extending parallelly in a first direction to provide element-forming regions at spaces between every adjacent two o ...


7
Yugo Tomioka, Yukihiro Okeda, Yasuo Sato: Semiconductor device having conducting layers connected through contact holes. Nippon Steel Corporation, Pollock Vande Sande & Priddy, October 11, 1994: US05355023 (11 worldwide citation)

A part of a polycrystalline silicon film forming a grounding line in a memory cell of a high-resistance load type SRAM, located immediately below a contact hole for connection between a polysilicon power supply line part and an aluminum power supply line part, is separated and isolated from the rema ...


8
Yugo Tomioka: Multi-value level type non-volatile semiconductor memory unit and method of rewriting the same. Nippon Steel Corporation, Pollock Vande Sande & Priddy, September 16, 1997: US05668756 (7 worldwide citation)

A non-volatile semiconductor memory unit comprises a memory cell having a semiconductor substrate, a control gate formed over the semiconductor substrate, an electric charge accumulative layer formed between the semiconductor substrate and the control gate, and a source and drain, both formed in the ...


9
Yugo Tomioka: Semiconductor memory having a memory cell including a capacitor with a two-layer lower electrode. Nippon Steel Corporation, Pollock Vande Sande & Priddy, August 30, 1994: US05343062 (5 worldwide citation)

A semiconductor memory having a memory cell including a stacked capacitor in which a lower electrode contacting one of two diffusion regions of an access transistor is formed in the form of two layers. It is preferable that impurities having a smaller diffusion coefficient, or arsenic is introduced ...


10
Yugo Tomioka: Production method for semiconductor device having field-shield isolation structure. Nippon Steel Semiconductor Corporation, Oblon Spivak McClelland Maier & Neustadt P C, February 9, 1999: US05869376 (4 worldwide citation)

The present invention has the object of offering a semiconductor production method which simplifies the fabrication of gate electrodes for MOS-type semiconductor elements and allows a high yield to be maintained. For this purpose, it has steps of forming a field-shield gate insulation film on a semi ...