1
Yingda Dong: Read operation for memory with compensation for coupling based on write-erase cycles. SanDisk Corporation, Vierra Magen Marcus & DeNiro, March 1, 2011: US07898864 (116 worldwide citation)

A read operation for non-storage elements compensates for floating gate-to-floating gate coupling and effects of program-erase cycles. During programming of a word line WLn+1, the threshold voltages of previously-programmed storage elements on WLn are increased due to coupling. To compensate for the ...


2
Nima Mokhlesi, Yingda Dong: System for performing data pattern sensitivity compensation using different voltage. Sandisk Corporation, Vierra Magen Marcus & DeNiro, December 18, 2007: US07310272 (90 worldwide citation)

Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To acc ...


3
Jeffrey W Lutze, Yingda Dong: Non-volatile memory using multiple boosting modes for reduced program disturb. SanDisk Corporation, Vierra Magen Marcus & DeNiro, December 23, 2008: US07468911 (82 worldwide citation)

A non-volatile storage system which reduces program disturb. Multiple boosting modes are implemented while programming non-volatile storage. For example, self-boosting, local self-boosting, erased area self-boosting and revised erased area self-boosting may be used. One or more switching criteria ar ...


4
Nima Mokhlesi, Yingda Dong: Data pattern sensitivity compensation using different voltage. SanDisk Corporation, Vierra Magen Marcus & DeNiro, November 11, 2008: US07450421 (72 worldwide citation)

Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To acc ...


5
Yingda Dong, Jeffrey W Lutze, Dana Lee, Gerrit Jan Hemink: Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data. SanDisk Corporation, Vierra Magen Marcus & DeNiro, October 7, 2008: US07433241 (37 worldwide citation)

Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the ...


6
Ken Oowada, Yingda Dong, Deepanshu Dutta: Extra dummy erase pulses after shallow erase-verify to avoid sensing deep erased threshold voltage. SanDisk Technologies, Vierra Magen Marcus & DeNiro, March 6, 2012: US08130551 (33 worldwide citation)

An erase operation for non-volatile memory includes first and second phases. The first phase applies a series of voltage pulses to a substrate, where each erase pulse is followed by a verify operation. The verify operation uses a verify level which is offset higher from a final desired threshold vol ...


7
Gerrit Jan Hemink, Yingda Dong, Jeffrey W Lutze, Dana Lee: Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages. SanDisk Corporation, Vierra Magen Marcus & DeNiro, November 11, 2008: US07450430 (31 worldwide citation)

Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the ...


8
Yingda Dong, Ken Oowada, Cynthia Hsu: Nonvolatile memory and method for improved programming with reduced verify. SanDisk Technologies, Davis Wright Tremaine, June 25, 2013: US08472257 (29 worldwide citation)

A group of memory cells of a nonvolatile memory is programmed in parallel in a programming pass with a minimum of verify steps from an erased state to respective target states by a staircase waveform. The memory states are demarcated by a set of increasing demarcation threshold values (V1, . . . , V ...


9
Yingda Dong, Man L Mui, Hitoshi Miwa: Reducing weak-erase type read disturb in 3D non-volatile memory. SanDisk Technologies, Vierra Magen Marcus, March 11, 2014: US08670285 (27 worldwide citation)

A read process for a 3D stacked memory device provides an optimum level of channel boosting for unselected memory strings, to repress both normal and weak-erase types of read disturbs. The channel is boosted by controlling of voltages of bit lines (Vbl), drain-side select gates (Vsgd_unsel), source- ...


10
Gerrit Jan Hemink, Yingda Dong, Jeffrey W Lutze, Dana Lee: Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages. SanDisk Corporation, Vierra Magen Marcus & DeNiro, December 9, 2008: US07463531 (23 worldwide citation)

Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the ...